| 1998 | ICCD | An approach to verify a large scale system-on-a-chip using symbolic model checking. | Koichiro Takayama, Taizo Satoh, Tsuneo Nakata, Fumiyasu Hirose |
| 1997 | ASPDAC | Acceleration of mincut partitioning using hardware CAD accelerator TP5000. | Masahiro Sano, Shintaro Shimogori, Fumiyasu Hirose |
| 1997 | DATE | Acceleration of behavioral simulation on simulation specific machines. | Minoru Shoji, Fumiyasu Hirose, Shintaro Shimogori, Satoshi Kowatari, Hiroshi Nagai |
| 1996 | ICCAD | CTL model checking based on forward state traversal. | Hiroaki Iwashita, Tsuneo Nakata, Fumiyasu Hirose |
| 1995 | ICCD | Logic synthesis for a single large look-up table. | Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose |
| 1994 | ICCAD | Automatic test program generation for pipelined processors. | Hiroaki Iwashita, Satoshi Kowatari, Tsuneo Nakata, Fumiyasu Hirose |
| 1992 | DAC | Performance Evaluation of an Event-Driven Logic Simulation Machine. | Fumiyasu Hirose |
| 1992 | VTS | Test pattern generation system for delay faults using a high speed simulation processor 'SP'. | Yukiko Izuta, Fumiyasu Hirose |
| 1988 | DAC | Logic Simulation System Using Simulation Processor (SP). | Minoru Saitoh, Kenji Iwata, Akiko Nokamura, Makoto Kakegawa, Junichi Masuda, Hirofumi Hamamura, Fumiyasu Hirose, Nobuaki Kawato |
| 1988 | ITC | A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator. | Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato |
| 1980 | DAC | Efficient placement and routing techniques for master slice LSI. | Hiroshi Shiraishi, Fumiyasu Hirose |