Guido Masera
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
47
Venues
17
Active years
2000–2026
Best venue rank
A*
Where they publish
Papers
47 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | CIRCE CROSS Integrated RISC-V Cryptographic Extension. | Alessandra Dolmeta, Valeria Piscopo, Maurizio Martina, Guido Masera |
| 2026 | DATE | Compact Yet Fast: An Efficient d-Order Masked Implementation of Ascon. | Mattia Mirigaldi, Nico Paninforni, Maurizio Martina, Guido Masera |
| 2025 | DAC | ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions. | Vincenzo Petrolo, Flavia Guella, Michele Caon, Pasquale Davide Schiavone, Guido Masera, Maurizio Martina |
| 2025 | DATE | TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography. | Alessandra Dolmeta, Stefano Di Matteo, Emanuele Valea, Mikael Carmona, Antoine Loiseau, Maurizio Martina, Guido Masera |
| 2025 | IJCNN | TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems. | Eugenio Ressa, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2025 | ISCAS | RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards. | Alessandra Dolmeta, Valeria Piscopo, Mattia Mirigaldi, Maurizio Martina, Guido Masera |
| 2025 | ITC | Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF). | Behnam Farnaghinejad, Davide Bellizia, Alessandra Dolmeta, Guido Masera, Antonio Porsia, Annachiara Ruospo, Stefano Di Carlo, Alessandro Savino, Ernesto Snchez |
| 2023 | IJCNN | SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers. | Alberto Marchisio, Davide Dura, Maurizio Capra, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2022 | ICIP | NLCMAP: A Framework for the Efficient Mapping of Non-Linear Convolutional Neural Networks on FPGA Accelerators. | Giuseppe Aiello, Beatrice Bussolino, Emanuele Valpreda, Massimo Ruo Roch, Guido Masera, Maurizio Martina, Stefano Marsi |
| 2022 | IJCNN | CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks. | Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique |
| 2022 | IROS | LaneSNNs: Spiking Neural Networks for Lane Detection on the Loihi Neuromorphic Processor. | Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2022 | ISLPED | Enabling Capsule Networks at the Edge through Approximate Softmax and Squash Operations. | Alberto Marchisio, Beatrice Bussolino, Edoardo Salvati, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2021 | IJCNN | DVS-Attacks: Adversarial Attacks on Dynamic Vision Sensors for Spiking Neural Networks. | Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2021 | IJCNN | CarSNN: An Efficient Spiking Neural Network for Event-Based Autonomous Cars on the Loihi Neuromorphic Research Processor. | Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2021 | IROS | R-SNN: An Analysis and Design Methodology for Robustifying Spiking Neural Networks against Adversarial Attacks through Noise Filters for Dynamic Vision Sensors. | Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2020 | DAC | Q-CapsNets: A Specialized Framework for Quantizing Capsule Networks. | Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2020 | IJCNN | FasTrCaps: An Integrated Framework for Fast yet Accurate Training of Capsule Networks. | Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Muhammad Abdullah Hanif, Maurizio Martina, Guido Masera, Muhammad Shafique |
| 2015 | DATE | An all-digital spike-based ultra-low-power IR-UWB dynamic average threshold crossing scheme for muscle force wireless transmission. | Masoud Shahshahani Amirhossein, Paolo Motto Ros, Alberto Bonanno, Marco Crepaldi, Maurizio Martina, Danilo Demarchi, Guido Masera |
| 2014 | ISCAS | A novel decoder architecture for error resilient JPEG2000 applications based on MQ arithmetic. | Simone Zezza, Guido Masera, Saeid Nooshabadi |
| 2014 | PDP | Rediscovering Logarithmic Diameter Topologies for Low Latency Network-on-Chip-Based Applications. | Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera |
| 2013 | DSD | VLSI Architecture for Low-Complexity Motion Estimation in H.264 Multiview Video Coding. | Ashfaq Ahmed, Muhammad Usman Shahid, Maurizio Martina, Enrico Magli, Guido Masera |
| 2013 | DSD | A Joint Communication and Application Simulator for NoC-Based Custom SoCs: LDPC and Turbo Codes Parallel Decoding Case Study. | Carlo Condo, Amer Baghdadi, Guido Masera |
| 2012 | DATE | A Network-on-Chip-based turbo/LDPC decoder architecture. | Carlo Condo, Maurizio Martina, Guido Masera |
| 2011 | ACC | Scalable, High Throughput LDPC Decoder for WiMAX (802.16e) Applications. | Muhammad Awais, Ashwani Singh, Guido Masera |
| 2011 | DSD | A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder. | Muhammad Awais, Ashwani Singh, Emmanuel Boutillon, Guido Masera |
| 2010 | DSD | ALOE-Based Flexible LDPC Decoder. | Ismael Gmez, Massimo Camatel, Jordi Bracke, Vuk Marojevic, Antoni Gelonch, Fabrizio Vacca, Guido Masera |
| 2010 | DSD | A Novel VLSI Architecture of Fixed-Complexity Sphere Decoder. | Bin Wu, Guido Masera |
| 2010 | GLOBECOM | Thermal Control for Crossbar-Based Input-Queued Switches. | Andrea Bianco, Paolo Giaccone, Guido Masera, Marco Ricca |
| 2009 | DSD | Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. | Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jzquel |
| 2009 | ICIP | A feasible VLSI engine for soft-input-soft-output for joint source channel codes. | Simone Zezza, Guido Masera, Saeid Nooshabadi |
| 2008 | DATE | VLSI implementation of SISO arithmetic decoders for joint source channel coding. | Simone Zezza, Guido Masera |
| 2008 | ICIP | Error resilient JPEG2000 decoding for wireless applications. | Simone Zezza, Maurizio Martina, Guido Masera, Saeid Nooshabadi |
| 2006 | DATE | A new approach to compress the configuration information of programmable devices. | Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante |
| 2006 | DATE | Interconnection framework for high-throughput, flexible LDPC decoders. | Federico Quaglio, Fabrizio Vacca, Cristiano Castellano, Alberto Tarable, Guido Masera |
| 2006 | ICASSP | Design of Application Specific Processors for the Cached FFT Algorithm. | Oguzhan Atak, Abdullah Atalar, Erdal Arikan, Harold Ishebabi, David Kammler, Gerd Ascheid, Heinrich Meyr, Mario Nicola, Guido Masera |
| 2006 | ICIP | Low-Complexity Video Compression Combining Adaptive Multifoveation and Reuse of High-Resolution Information. | Giorgio Pioppo, Rashid Ansari, Ashfaq A. Khokhar, Guido Masera |
| 2006 | TridentCom | Mixed hardware-software testbed for IEEE-802.11n. | Mario Nicola, Alberto Dassatti, Guido Masera, Andrea Concil, Angelo Poloni |
| 2005 | ICIP | Low-complexity, efficient 9/7 wavelet filters implementation. | Maurizio Martina, Guido Masera |
| 2005 | ICIP | Optimized CORDIC core for frequency-domain motion estimation. | Andrea Molino, Fabrizio Vacca, Guido Masera |
| 2004 | DATE | Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study. | Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda |
| 2003 | FPGA | Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. | Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni |
| 2002 | FPL | Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2002 | ICASSP | Reconfigurable DSP IP for multimedia applications. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2001 | ISLPED | Synthesis of low-leakage PD-SOI circuits with body-biasing. | Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni |
| 2001 | VLSID | Switching Noise Analysis Framework For High Speed Logic Families. | Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni |
| 2000 | DATE | A 50 Mbit/s Iterative Turbo-Decoder. | Fabrizio Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 2000 | ISCAS | A high accuracy-low complexity model for CMOS delays. | Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |