Haruo Kobayashi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
25
Venues
8
Active years
1995–2025
Best venue rank
A
Where they publish
Papers
25 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | A 10ps-Order Flexible Resolution Time-to-Digital Converter with Linearity Calibration and Legacy FPGA. | Kentaroh Katoh, Toru Nakura, Haruo Kobayashi |
| 2025 | ITC | High Reliability Delay-Based Weak FPGA PUF Using High-Resolution Stochastic Delay Measurement With Phase Locked Loops. | Kentaroh Katoh, Toru Nakura, Haruo Kobayashi |
| 2024 | VTS | Innovative Practices Session at VLSI Test Symposium 2024: Analog Testing Technologies for Digital Exploding Society. | Haruo Kobayashi, Naoki Tsukahara, Keno Sato, Takashi Oshima |
| 2023 | ITC | Low Distortion Sinusoidal Signal Generator with Harmonics Cancellation Using Two Types of Digital Predistortion. | Keno Sato, Takayuki Nakatani, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Shogo Katayama, Daisuke Iimori, Misaki Takagi, Yujie Zhao, Shuhei Yamamoto, Anna Kuwana, Kentaroh Katoh, Kazumi Hatayama, Haruo Kobayashi |
| 2022 | VTS | Innovative Practices Track: Innovative Analog Circuit Testing Technologies. | Chris Mangelsdorf, Manasa Madhvaraj, Salvador Mir, Manuel J. Barragn, Daisuke Iimori, Takayuki Nakatani, Shogo Katayama, Gaku Ogihara, Yujie Zhao, Jianglin Wei, Anna Kuwana, Kentaroh Katoh, Kazumi Hatayama, Haruo Kobayashi, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa |
| 2021 | IOLTS | Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method. | Shuhei Yamamoto, Yuto Sasaki, Yujie Zhao, Jianglin Wei, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Takayuki Nakatani, Minh Tri Tran, Shogo Katayama, Kazumi Hatayama, Haruo Kobayashi |
| 2021 | ITC | Summing Node and False Summing Node Methods: Accurate Operational Amplifier AC Characteristics Testing without Audio Analyzer. | Daisuke Iimori, Takayuki Nakatani, Shogo Katayama, Gaku Ogihara, Akemi Hatta, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jianglin Wei, Yujie Zhao, Minh Tri Tran, Kazumi Hatayama, Haruo Kobayashi |
| 2021 | ITC | Revisit to Accurate ADC Testing with Incoherent Sampling Using Proper Sinusoidal Signal and Sampling Frequencies. | Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jianglin Wei, Takayuki Nakatani, Yujie Zhao, Shogo Katayama, Shuhei Yamamoto, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi |
| 2020 | VTS | Innovative Test Practices in Asia. | Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, Harry H. Chen, Haruo Kobayashi, Kazumi Hatayama |
| 2019 | VTS | Innovative Test Practices in Japan. | Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi |
| 2018 | VTS | Innovative practices on test in Japan. | Koji Asami, Yoshiro Tamura, Haruo Kobayashi, Jun Matsushima, Yoichi Maeda, Kazumi Hatayama |
| 2017 | VTS | A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm. | Peter Sarson, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi |
| 2016 | ITC | I-Q signal generation techniques for communication IC testing and ATE systems. | Masahiro Murakami, Haruo Kobayashi, Shaiful Nizam Bin Mohyar, Osamu Kobayashi, Takahiro Miki, Junya Kojima |
| 2014 | ITC | Low-distortion signal generation for ADC testing. | Fumitaka Abe, Yutaro Kobayashi, Kenji Sawada, Keisuke Kato, Osamu Kobayashi, Haruo Kobayashi |
| 2013 | ASPDAC | Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. | Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi |
| 2012 | ASPDAC | A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS. | Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Daiki Hirabayashi, Takahiro J. Yamaguchi, Haruo Kobayashi |
| 2010 | ITC | Timing skew compensation technique using digital filter with novel linear phase condition. | Koji Asami, Hiroyuki Miyajima, Tsuyoshi Kurosawa, Takenori Tateiwa, Haruo Kobayashi |
| 2009 | ASPDAC | A Time-to-Digital Converter with small circuitry. | Kazuya Shimizu, Masato Kaneta, HaiJun Lin, Haruo Kobayashi, Nobukazu Takai, Masao Hotta |
| 2007 | ASPDAC | A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18m CMOS. | Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Masao Hotta |
| 2005 | ISCAS | A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI. | Takanori Komuro, Naoto Hayasaka, Haruo Kobayashi, Hiroshi Sakayori |
| 2004 | VLSID | An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators. | Hao San, Haruo Kobayashi, Shinya Kawakami, Nobuyuki Kuroiwa |
| 2001 | ISCAS | Channel linearity mismatch effects in time-interleaved ADC systems. | Naoki Kurosawa, Haruo Kobayashi, Kensuke Kobayashi |
| 1999 | ISCAS | Modeling and parameter extraction technique for high-voltage MOS device. | Takao Myono, E. Nishibe, S. Kikuchi, K. Iwatsu, Tatsuya Suzuki, Y. Sasaki, K. Itoh, Haruo Kobayashi |
| 1998 | ICASSP | Spatial and temporal stability of vision chips including parasitic inductances and capacitances. | Haruo Kobayashi, Takashi Matsumoto |
| 1995 | ISCAS | Error Correction Algorithm for Folding/Interpolation ADC. | Haruo Kobayashi, Hiroshi Sakayori, Tsutomu Tobari, Hiroyuki Matsuura |