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Ivo Bolsens

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

32

Venues

10

Active years

1989–2017

Best venue rank

A*

Where they publish

Papers

32 indexed papers, newest first.

YearVenueTitleAuthors
2017FPL"All programmable FPGA, providing hardware efficiency to software programmers".Ivo Bolsens
2014ASPDAC"All Programmable SOC FPGA for networking and computing in big data infrastructure".Ivo Bolsens, Georges G. E. Gielen, Kaushik Roy, Ulf Schneider
2008FPLFPGA: The future platform for transforming, transporting and computing data.Ivo Bolsens
2005ASPDACAre we ready for system-level synthesis?Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe
2004DACWhat happened to ASIC?: Go (recon)figure?Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar
2003DACFast, cheap and under control: the next implementation fabric.Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi
2003DATEPanel Title: Reconfigurable Computing - Different Perspectives.Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang
2003IOLTSChallenges and Opportunities for FPGA Programmable System Platforms.Ivo Bolsens
2002DATEDesign Technology for Networked Reconfigurable FPGA Platforms.Steve Guccione, Diederik Verkest, Ivo Bolsens
2002DATEReconfigurable SoC - What Will it Look Like?J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan
2002FPLChallenges and Opportunities for FPGA Platforms.Ivo Bolsens
2001DATEHigh-level simulation of substrate noise generation from large digital circuits with multiple supplies.Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens
2001DATEEfficient bit-error-rate estimation of multicarrier transceivers.Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stphane Donnay, Marc Engels, Ivo Bolsens
2000DACHigh-level simulation of substrate noise generation including power supply noise coupling.Marc van Heijningen, Mustafa Badaroglu, Stphane Donnay, Marc Engels, Ivo Bolsens
2000DACA methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers.Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens
2000DATECompact Modeling of Nonlinear Distortion in Analog Communication Circuits.Piet Wambacq, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens
1999DACImplementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System.Lode Nachtergaele, Bart Vanhoof, Mercedes Pen, Gauthier Lafruit, Jan Bormans, Ivo Bolsens
1999DACHardware Reuse at the Behavioral Level.Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens
1999DATESingle Chip or Hybrid System Integration.Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick
1999DATEA Methodology and Design Environment for DSP ASIC Fixed-Point Refinement.Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
1999DATEA Single-Package Solution for Wireless Transceivers.Piet Wambacq, Stphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
1999MMSPImplementation driven selection of wavelet filters for still image coding based on bitrange expansion.Bart Masschelein, Bart Vanhoof, Lode Nachtergaele, Jan Bormans, Ivo Bolsens
1998DACA Programming Environment for the Design of Complex High Speed ASICs.Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1998RSPA Technique for Combined Virtual Prototyping and Hardware Design.Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens
1997DATESynthesis of multi-rate and variable rate circuits for high speed telecommunications applications.Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1996DACCombined Control Flow Dominated and Data Flow Dominated High-Level Synthesis.Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Frhel, Ahmed Amine Jerraya, Ivo Bolsens
1996VLSIDDesigning Systems On Silicon: A Digital Spread Spectrum Pager.S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man
1994ICCADDesign of heterogeneous ICs for mobile and personal communication systems.Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor
1992ICCDJust in Time Scheduling.Karl van Rompaey, Ivo Bolsens, Hugo De Man
1991ICCADCompiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory.Jan Vanhoof, Ivo Bolsens, Hugo De Man
1990ICCDDerivation of signal flow direction in MOS VLSI: an alternative.W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man
1989DACElectrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour.Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man