Jeyavijayan Rajendran
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
55
Venues
14
Active years
2010–2026
Best venue rank
A*
Where they publish
Papers
55 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | AsiaCCS | Untitled record | Rahul Kande, Mohamadreza Rostami, Chen Chen, Hareesh Khattri, Jason M. Fung, Ahmad-Reza Sadeghi, Jeyavijayan Rajendran |
| 2026 | DATE | Focus Session: Advanced Hybrid Hardware Fuzzing. | Chen Chen, Stephen Muttathil, Mohamadreza Rostami, Nikhilesh Singh, Lichao Wu, Ahmad-Reza Sadeghi, Jeyavijayan Rajendran |
| 2026 | DATE | Focus Session: What the Fuzz! Pushing Beyond Randomness in Hardware Security with Generative AI. | Nikhilesh Singh, Mohamadreza Rostami, Lichao Wu, Chen Chen, Stephen Muttathil, Jeyavijayan Rajendran, Ahmad-Reza Sadeghi |
| 2026 | DATE | Special Day - GUIDE: GenAI Units In Digital Design Education. | Weihua Xiao, Jason Blocklove, Matthew DeLorenzo, Johann Knechtel, Ozgur Sinanoglu, Kanad Basu, Jeyavijayan Rajendran, Siddharth Garg, Ramesh Karri |
| 2026 | NDSS | ReFuzz: Reusing Tests for Processor Fuzzing with Contextual Bandits. | Chen Chen, Zaiyan Xu, Mohamadreza Rostami, David Liu, Dileep Kalathil, Ahmad-Reza Sadeghi, Jeyavijayan Rajendran |
| 2025 | DAC | Free and Fair Hardware: A Pathway to Copyright Infringement-Free Verilog Generation using LLMs. | Sam Bush, Matthew DeLorenzo, Phat Tieu, Jeyavijayan Rajendran |
| 2025 | ICCD | Tracing the Logic: Evaluating LLM Reasoning Paths in RTL Generation. | Matthew DeLorenzo, Kevin Tieu, Jeyavijayan Rajendran |
| 2025 | NDSS | LLMPirate: LLMs for Black-box Hardware IP Piracy. | Vasudev Gohil, Matthew DeLorenzo, Veera Vishwa Achuta Sai Venkat Nallam, Joey See, Jeyavijayan Rajendran |
| 2024 | DAC | ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM. | Jonathan Hao-Cheng Ku, Junyao Zhang, Haoxuan Shan, Saichand Samudrala, Jiawen Wu, Qilin Zheng, Ziru Li, Jeyavijayan Rajendran, Yiran Chen |
| 2024 | DAC | Lost and Found in Speculation: Hybrid Speculative Vulnerability Detection. | Mohamadreza Rostami, Shaza Zeitouni, Rahul Kande, Chen Chen, Pouya Mahmoody, Jeyavijayan Rajendran, Ahmad-Reza Sadeghi |
| 2024 | DATE | MABFuzz: Multi-Armed Bandit Algorithms for Fuzzing Processors. | Vasudev Gohil, Rahul Kande, Chen Chen, Ahmad-Reza Sadeghi, Jeyavijayan Rajendran |
| 2024 | DATE | Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing. | Mohamadreza Rostami, Marco Chilese, Shaza Zeitouni, Rahul Kande, Jeyavijayan Rajendran, Ahmad-Reza Sadeghi |
| 2024 | VTS | LLMs for Hardware Security: Boon or Bane? | Rahul Kande, Vasudev Gohil, Matthew DeLorenzo, Chen Chen, Jeyavijayan Rajendran |
| 2023 | ICCAD | PSOFuzz: Fuzzing Processors with Particle Swarm Optimization. | Chen Chen, Vasudev Gohil, Rahul Kande, Ahmad-Reza Sadeghi, Jeyavijayan Rajendran |
| 2022 | CCS | ATTRITION: Attacking Static Hardware Trojan Detection Techniques Using Reinforcement Learning. | Vasudev Gohil, Hao Guo, Satwik Patnaik, Jeyavijayan Rajendran |
| 2022 | ICCAD | Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool. | Swarup Bhunia, Amitabh Das, Saverio Fazzari, Vivian Kammler, David Kehlet, Jeyavijayan Rajendran, Ankur Srivastava |
| 2019 | ASPDAC | Layout recognition attacks on split manufacturing. | Wenbin Xu, Lang Feng, Jeyavijayan Rajendran, Jiang Hu |
| 2019 | ICCD | Red Teaming a Multi-Colored Bluetooth Bulb. | Ryan Vrecenar, Michael Hall, Joshua Zshiesche, Mahesh Naidu, Jeyavijayan Rajendran, Stavros Kalafatis |
| 2019 | ITC | Breaking Analog Locking Techniques via Satisfiability Modulo Theories. | Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Snchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran |
| 2018 | ICCAD | Towards provably-secure analog and mixed-signal locking against overproduction. | Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Snchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran |
| 2018 | VTS | Special session: Recent developments in hardware security. | Ro Cammarota, Naghmeh Karimi, Siddharth Garg, Jeyavijayan Rajendran |
| 2017 | ASPDAC | Security analysis of Anti-SAT. | Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, Jeyavijayan Rajendran |
| 2017 | CCS | Boolean Circuit Camouflage: Cryptographic Models, Limitations, Provable Results and a Random Oracle Realization. | Giovanni Di Crescenzo, Jeyavijayan Rajendran, Ramesh Karri, Nasir D. Memon |
| 2017 | CCS | Provably-Secure Logic Locking: From Theory To Practice. | Muhammad Yasin, Abhrajit Sengupta, Mohammed Thari Nabeel, Mohammed Ashraf, Jeyavijayan Rajendran, Ozgur Sinanoglu |
| 2017 | ICCAD | Making split fabrication synergistically secure and manufacturable. | Lang Feng, Yujie Wang, Jiang Hu, Wai-Kei Mak, Jeyavijayan Rajendran |
| 2017 | ICCAD | Making split fabrication synergistically secure and manufacturable. | Lang Feng, Yujie Wang, Jiang Hu, Wai-Kei Mak, Jeyavijayan Rajendran |
| 2017 | ICCAD | Front-end-of-line attacks in split manufacturing. | Yujie Wang, Tri Cao, Jiang Hu, Jeyavijayan Rajendran |
| 2016 | DAC | The cat and mouse in split manufacturing. | Yujie Wang, Pu Chen, Jiang Hu, Jeyavijayan Rajendran |
| 2016 | DATE | Activation of logic encrypted chips: Pre-test or post-test? | Muhammad Yasin, Samah Mohamed Saeed, Jeyavijayan Rajendran, Ozgur Sinanoglu |
| 2016 | ICCAD | Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect. | Chaofei Yang, Beiye Liu, Hai Li, Yiran Chen, Wujie Wen, Mark Barnell, Qing Wu, Jeyavijayan Rajendran |
| 2016 | ICCAD | CamoPerturb: secure IC camouflaging for minterm protection. | Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, Jeyavijayan Rajendran |
| 2016 | ICCD | Hardware-based attacks to compromise the cryptographic security of an election system. | Mohammad-Mahdi Bidmeshki, Gaurav Rajavendra Reddy, Liwei Zhou, Jeyavijayan Rajendran, Yiorgos Makris |
| 2016 | ISCAS | Securing pressure measurements using SensorPUFs. | Jeyavijayan Rajendran, Jack Tang, Ramesh Karri |
| 2016 | VLSID | Formal Security Verification of Third Party Intellectual Property Cores for Information Leakage. | Jeyavijayan Rajendran, Arunshankar Muruga Dhandayuthapany, Vivekananda Vedula, Ramesh Karri |
| 2015 | DAC | Detecting malicious modifications of data in third-party intellectual property cores. | Jeyavijayan Rajendran, Vivekananda Vedula, Ramesh Karri |
| 2014 | DAC | A Red Team/Blue Team Assessment of Functional Analysis Methods for Malicious Circuit Identification. | Adam Waksman, Jeyavijayan Rajendran, Matthew Suozzo, Simha Sethumadhavan |
| 2014 | ICCAD | Shielding and securing integrated circuits with sensors. | Davood Shahrjerdi, Jeyavijayan Rajendran, Siddharth Garg, Farinaz Koushanfar, Ramesh Karri |
| 2014 | VTS | Hot topic session 9C: Test and fault tolerance for emerging memory technologies. | Suriya Natarajan, Amitava Majumdar, Jeyavijayan Rajendran |
| 2013 | ASPDAC | Hardware security strategies exploiting nanoelectronic circuits. | Garrett S. Rose, Jeyavijayan Rajendran, Nathan R. McDonald, Ramesh Karri, Miodrag Potkonjak, Bryant T. Wysocki |
| 2013 | CCS | Security analysis of integrated circuit camouflaging. | Jeyavijayan Rajendran, Michael Sam, Ozgur Sinanoglu, Ramesh Karri |
| 2013 | DATE | Is split manufacturing secure? | Jeyavijayan Rajendran, Ozgur Sinanoglu, Ramesh Karri |
| 2013 | ETS | Reconciling the IC test and security dichotomy. | Ozgur Sinanoglu, Naghmeh Karimi, Jeyavijayan Rajendran, Ramesh Karri, Yier Jin, Ke Huang, Yiorgos Makris |
| 2013 | ICCAD | Hardware security: threat models and metrics. | Masoud Rostami, Farinaz Koushanfar, Jeyavijayan Rajendran, Ramesh Karri |
| 2013 | IOLTS | High-level synthesis for security and trust. | Jeyavijayan Rajendran, Huan Zhang, Ozgur Sinanoglu, Ramesh Karri |
| 2013 | ITC | VLSI testing based security metric for IC camouflaging. | Jeyavijayan Rajendran, Ozgur Sinanoglu, Ramesh Karri |
| 2013 | VLSID | Sneak-path Testing of Memristor-based Memories. | Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu |
| 2013 | VTS | A study on the effectiveness of Trojan detection techniques using a red team blue team approach. | Xuehui Zhang, Kan Xiao, Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri |
| 2012 | DAC | Security analysis of logic obfuscation. | Jeyavijayan Rajendran, Youngok K. Pino, Ozgur Sinanoglu, Ramesh Karri |
| 2012 | DATE | Logic encryption: A fault analysis perspective. | Jeyavijayan Rajendran, Youngok K. Pino, Ozgur Sinanoglu, Ramesh Karri |
| 2012 | ICCD | Engineering crossbar based emerging memory technologies. | Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu |
| 2011 | ICCD | Blue team red team approach to hardware trust assessment. | Jeyavijayan Rajendran, Vinayaka Jyothi, Ramesh Karri |
| 2011 | ISCAS | Parallel memristors: Improving variation tolerance in memristive digital circuits. | Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose |
| 2011 | VLSID | An Approach to Tolerate Process Related Variations in Memristor-Based Applications. | Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose |
| 2011 | VTS | Design and analysis of ring oscillator based Design-for-Trust technique. | Jeyavijayan Rajendran, Vinayaka Jyothi, Ozgur Sinanoglu, Ramesh Karri |
| 2010 | ISCAS | Towards a comprehensive and systematic classification of hardware Trojans. | Jeyavijayan Rajendran, Efstratios Gavas, Jorge Jimenez, Vikram Padman, Ramesh Karri |