| 2026 | DATE | Ramen: Radiation-Aware Modeling Framework for PDK-Enabled Design and Library Characterization. | Quan Cheng, Haoyuan Li, Zhenzhe Chen, Wang Liao, Jing-Jia Liou, Masanori Hashimoto, Longyang Lin |
| 2025 | ICCAD | Tenpura: A General Transient Fault Evaluation and Scope Narrowing Platform for Ultra-fast Reliability Analysis. | Quan Cheng, Huizi Zhang, Chien-Hsing Liang, Mingtao Zhang, Jing-Jia Liou, Jinjun Xiong, Longyang Lin, Masanori Hashimoto |
| 2025 | ITC | Genshin: A Generalized Framework with Software-Hardware Co-design and Pruned Fault Injection for Reliability Analysis. | Quan Cheng, Hao-Yang Chi, Chien-Hsing Liang, Yu-Hong Chao, Huizi Zhang, Yuan Liang, Mingtao Zhang, Wang Liao, Jinjun Xiong, Jing-Jia Liou, Masanori Hashimoto, Longyang Lin |
| 2025 | ITC | Test and Calibration Methods for Process Variation of ReRAM-based Spiking Neural Networks. | Po-Sheng Chiu, Chih-Yu Hsu, Chih-Tsun Huang, Jing-Jia Liou |
| 2025 | ITC | A Probabilistic Approach of Fault Propagation at RTL and its Application to Transient Fault Analysis. | Chien-Hsing Liang, Yu-Hong Chao, Jing-Jia Liou, Harry H. Chen |
| 2023 | ICCD | MultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory Hierarchy. | Chia-Wei Chang, Jing-Jia Liou, Chih-Tsun Huang, Wei-Chung Hsu, Juin-Ming Lu |
| 2022 | ITC | Transient Fault Pruning for Effective Candidate Reduction in Functional Debugging. | Dun-An Yang, Jing-Jia Liou, Harry H. Chen |
| 2021 | ITC | ACE-Pro: Reduction of Functional Errors with ACE Propagation Graph. | Dun-An Yang, Yu-Teng Chang, Ting-Shuo Hsu, Jing-Jia Liou, Harry H. Chen |
| 2019 | FPGA | A FPGA Implementation of Farneback Optical Flow by High-Level Synthesis. | Chia-Wei Chang, Zi-Qi Zhong, Jing-Jia Liou |
| 2015 | ASPDAC | Design of a scalable many-core processor for embedded applications. | Hsiao-Wei Chien, Jyun-Long Lai, Chao-Chieh Wu, Chih-Tsun Huang, Ting-Shuo Hsu, Jing-Jia Liou |
| 2015 | ASPDAC | A fast and accurate network-on-chip timing simulator with a flit propagation model. | Ting-Shuo Hsu, Jun-Lin Chiu, Chao-Kai Yu, Jing-Jia Liou |
| 2014 | ICCD | Chip clustering with mutual information on multiple clock tests and its application to yield tuning. | Jiun-Yi Chiang, Jun-Hua Kuo, Ting-Shuo Hsu, Jing-Jia Liou |
| 2013 | ISCA | Design of high-throughput Inter-PE communication with application-level flow control protocol for many-core architectures. | Jyu-Yuan Lai, Ting-Shuo Hsu, Po-Yu Chen, Chih-Tsun Huang, Yu-Hsun Chen, Jing-Jia Liou |
| 2012 | ASPDAC | On error modeling of electrical bugs for post-silicon timing validation. | Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing-Jia Liou |
| 2011 | ASPDAC | TurboVG: A HW/SW co-designed multi-core OpenVG accelerator for vector graphics applications with embedded power profiler. | Shuo-Hung Chen, Hsiao-Mei Lin, Ching-Chou Hsieh, Chih-Tsun Huang, Jing-Jia Liou, Yeh-Ching Chung |
| 2011 | ASPDAC | Diagnosis-assisted supply voltage configuration to increase performance yield of cell-based designs. | Jing-Jia Liou, Ying-Yen Chen, Chun-Chia Chen, Chung-Yen Chien, Kuo-Li Wu |
| 2011 | DAC | A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing. | Chin-Fu Li, Chi-Ying Lee, Chen-Hsing Wang, Shu-Lin Chang, Li-Ming Denq, Chun-Chuan Chi, Hsuan-Jung Hsu, Ming-Yi Chu, Jing-Jia Liou, Shi-Yu Huang, Po-Chiun Huang, Hsi-Pin Ma, Jenn-Chyou Bor, Cheng-Wen Wu, Ching-Cheng Tien, Chi-Hu Wang, Yung-Sheng Kuo, Chih-Tsun Huang, Tien-Yu Chang |
| 2007 | DAC | Extraction of Statistical Timing Profiles Using Test Data. | Ying-Yen Chen, Jing-Jia Liou |
| 2007 | ITC | An efficient SAT-based path delay fault ATPG with an unified sensitization model. | Shun-Yen Lu, Ming-Ting Hsieh, Jing-Jia Liou |
| 2007 | VTS | Handling Pattern-Dependent Delay Faults in Diagnosis. | Jyun-Wei Chen, Ying-Yen Chen, Jing-Jia Liou |
| 2006 | ICCAD | Exploring linear structures of critical path delay faults to reduce test efforts. | Shun-Yen Lu, Pei-Ying Hsieh, Jing-Jia Liou |
| 2005 | ITC | Diagnosis framework for locating failed segments of path delay faults. | Ying-Yen Chen, Min-Pin Kuo, Jing-Jia Liou |
| 2005 | VTS | A BIST Scheme for FPGA Interconnect Delay Faults. | Chun-Chieh Wang, Jing-Jia Liou, Yen-Lin Peng, Chih-Tsun Huang, Cheng-Wen Wu |
| 2003 | ASPDAC | Experience in critical path selection for deep sub-micron delay test and timing validation. | Jing-Jia Liou, Li-C. Wang, Angela Krstic, Kwang-Ting Cheng |
| 2003 | DAC | Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, T. M. Mak |
| 2003 | DATE | Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, Magdy S. Abadir |
| 2003 | VTS | Diagnosis of Delay Defects Using Statistical Timing Models. | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou |
| 2002 | DAC | False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation. | Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng |
| 2002 | DAC | Enhancing test efficiency for delay fault testing using multiple-clocked schemes. | Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams |
| 2002 | ICCAD | On theoretical and practical considerations of path selection for delay fault testing. | Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng |
| 2002 | ITC | Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. | Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams |
| 2001 | DAC | Fast Statistical Timing Analysis By Probabilistic Event Propagation. | Jing-Jia Liou, Kwang-Ting Cheng, Sandip Kundu, Angela Krstic |
| 2001 | ITC | Delay testing considering crosstalk-induced effects. | Angela Krstic, Jing-Jia Liou, Yi-Min Jiang, Kwang-Ting Cheng |
| 2000 | ASPDAC | Performance sensitivity analysis using statistical method and its applications to delay. | Jing-Jia Liou, Angela Krstic, Kwang-Ting Cheng, Deb Aditya Mukherjee, Sandip Kundu |
| 2000 | ICCAD | Path Selection and Pattern Generation for Dynamic Timing Analysis Considering Power Supply Noise Effects. | Jing-Jia Liou, Angela Krstic, Yi-Min Jiang, Kwang-Ting Cheng |
| 2000 | VTS | Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis. | Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukherjee |