| 2026 | DATE | Design for testability using mixed-polarity flip-flops and latches. | Lorenzo Lagostina, Jordi Cortadella, Mario R. Casu, Luciano Lavagno |
| 2025 | ICCAD | Promise: Property Mining for Sequential Synthesis. | Jiahui Xu, Jordi Cortadella, Lana Josipovic |
| 2023 | DSD | Seto: A Framework for the Decomposition of Petri Nets and Transition Systems. | Viktor Teren, Jordi Cortadella, Tiziano Villa |
| 2023 | FPGA | Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking. | Jiahui Xu, Emmet Murphy, Jordi Cortadella, Lana Josipovic |
| 2022 | DSD | Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets. | Viktor Teren, Jordi Cortadella, Tiziano Villa |
| 2021 | DSD | Decomposition of transition systems into sets of synchronizing state machines. | Viktor Teren, Jordi Cortadella, Tiziano Villa |
| 2020 | DATE | Computing the full quotient in bi-decomposition by approximation. | Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa |
| 2020 | FPGA | Buffer Placement and Sizing for High-Performance Dataflow Circuits. | Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella |
| 2020 | ISCAS | Transistor Placement for Automatic Cell Synthesis through Boolean Satisfiability. | Maicon Schneider Cardoso, Andrei A. O. Bubolz, Jordi Cortadella, Leomar Soares da Rosa Jnior, Felipe S. Marques |
| 2019 | DAC | Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. | Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu |
| 2019 | DATE | RTL-Aware Dataflow-Driven Macro Placement. | Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell |
| 2017 | ACSSC | A hierarchical mathematical model for automatic pipelining and allocation using elastic systems. | Jordi Cortadella, Jordi Petit |
| 2016 | BPM | Discovering Duplicate Tasks in Transition Systems for the Simplification of Process Models. | Javier de San Pedro, Jordi Cortadella |
| 2016 | SAC | Mining structured petri nets for the visualization of process behavior. | Javier de San Pedro, Jordi Cortadella |
| 2015 | ASPDAC | A retargetable and accurate methodology for logic-IP-internal electromigration assessment. | Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella |
| 2015 | BPM | Log-Based Simplification of Process Models. | Javier de San Pedro, Josep Carmona, Jordi Cortadella |
| 2015 | ICCD | Reactive clocks with variability-tracking jitter. | Jordi Cortadella, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar |
| 2014 | DATE | Hardware primitives for the synthesis of multithreaded elastic systems. | Giorgos Dimitrakopoulos, I. Seitanidis, Anastasios Psarras, K. Tsiouris, Pavlos M. Mattheakis, Jordi Cortadella |
| 2014 | ICCAD | A hierarchical approach for generating regular floorplans. | Javier de San Pedro, Jordi Cortadella, Antoni Roca |
| 2012 | SIGCSE | Integrating formal verification in an online judge for e-Learning logic circuit design. | Javier de San Pedro, Josep Carmona, Jordi Cortadella, Jordi Petit |
| 2010 | DATE | Automatic microarchitectural pipelining. | Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky |
| 2010 | ICCAD | Symbolic performance analysis of elastic systems. | Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky |
| 2010 | MEMOCODE | Elastic systems. | Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky |
| 2009 | BPM | Divide-and-Conquer Strategies for Process Mining. | Josep Carmona, Jordi Cortadella, Michael Kishinevsky |
| 2009 | DAC | Retiming and recycling for elastic systems with early evaluation. | Dmitry Bufistov, Jordi Cortadella, Marc Galceran Oms, Jorge Jlvez, Michael Kishinevsky |
| 2009 | DAC | Speculation in elastic systems. | Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky |
| 2009 | DAC | Enabling adaptability through elastic clocks. | Emre Tuncer, Jordi Cortadella, Luciano Lavagno |
| 2009 | DATE | Variable-latency design by function speculation. | David Baeres, Jordi Cortadella, Michael Kishinevsky |
| 2009 | ICCAD | Multi-level clustering for clock skew optimization. | Jonas Casanova, Jordi Cortadella |
| 2009 | ICCAD | A performance analytical model for Network-on-Chip with constant service time routers. | Nikita Nikitin, Jordi Cortadella |
| 2008 | BPM | A Region-Based Algorithm for Discovering Petri Nets from Event Logs. | Josep Carmona, Jordi Cortadella, Michael Kishinevsky |
| 2008 | ICCAD | Performance optimization of elastic systems using buffer resizing and buffer insertion. | Dmitry Bufistov, Jorge Jlvez, Jordi Cortadella |
| 2008 | ICCAD | Correct-by-construction microarchitectural pipelining. | Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms |
| 2007 | DAC | Synchronous Elastic Circuits with Early Evaluation and Token Counterflow. | Jordi Cortadella, Michael Kishinevsky |
| 2007 | DATE | Layout-aware gate duplication and buffer insertion. | David Baeres, Jordi Cortadella, Michael Kishinevsky |
| 2007 | ICCAD | A general model for performance optimization of sequential systems. | Dmitry Bufistov, Jordi Cortadella, Michael Kishinevsky, Sachin S. Sapatnekar |
| 2006 | CSR | Synchronous Elastic Circuits. | Michael Kishinevsky, Jordi Cortadella, Bill Grundmann, Sava Krstic, John O'Leary |
| 2006 | DAC | State encoding of large asynchronous controllers. | Josep Carmona, Jordi Cortadella |
| 2006 | DAC | Synthesis of synchronous elastic architectures. | Jordi Cortadella, Michael Kishinevsky, Bill Grundmann |
| 2006 | FMCAD | Synchronous Elastic Networks. | Sava Krstic, Jordi Cortadella, Michael Kishinevsky, John O'Leary |
| 2006 | ICCAD | From molecular interactions to gates: a systematic approach. | Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper |
| 2006 | ICCAD | Performance analysis of concurrent systems with early evaluation. | Jorge Jlvez, Jordi Cortadella, Michael Kishinevsky |
| 2004 | ASPDAC | Verification of timed circuits with symbolic delays. | Robert Claris, Jordi Cortadella |
| 2004 | DAC | A recursive paradigm to solve Boolean relations. | David Baeres, Jordi Cortadella, Michael Kishinevsky |
| 2004 | DATE | From Synchronous to Asynchronous: An Automatic Approach. | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou |
| 2004 | ICCD | Coping with The Variability of Combinational Logic Delays. | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou |
| 2004 | VLSID | Bridging the Gap between Asynchronous Design and Designers. | Peter A. Beerel, Jordi Cortadella, Alex Kondratyev |
| 2004 | VLSID | Boolean Decomposition Using Two-literal Divisors. | Nilesh Modi, Jordi Cortadella |
| 2004 | SAS | The Octahedron Abstract Domain. | Robert Claris, Jordi Cortadella |
| 2003 | ICCAD | ILP Models for the Synthesis of Asynchronous Control Circuits. | Josep Carmona, Jordi Cortadella |
| 2002 | DATE | A Case Study for the Verification of Complex Timed Circuits: IPCMOS. | Marco A. Pea, Jordi Cortadella, Alexander B. Smirnov, Enric Pastor |
| 2002 | FMCAD | Input/Output Compatibility of Reactive Systems. | Josep Carmona, Jordi Cortadella |
| 2002 | VLSID | Logic Design of Asynchronous Circuits (Tutorial Abstract). | Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside |
| 2000 | DAC | Task generation and compile-time scheduling for mixed data-control embedded software. | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli |
| 1999 | DAC | Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev |
| 1999 | DAC | CAD Directions for High Performance Asynchronous Circuits. | Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken |
| 1999 | ICCAD | Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. | Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens |
| 1999 | ICCAD | What is the cost of delay insensitivity? | Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev |
| 1998 | DAC | Asynchronous Interface Specification, Analysis and Synthesis. | Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev |
| 1998 | DATE | Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. | Enric Pastor, Jordi Cortadella |
| 1998 | ICCAD | Lazy transition systems: application to timing optimization of asynchronous circuits. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev |
| 1998 | ICCD | Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. | Toms Lang, Enric Musoll, Jordi Cortadella |
| 1997 | DAC | Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. | Oriol Roig, Jordi Cortadella, Marco A. Pea, Enric Pastor |
| 1997 | DAC | Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. | Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Pea, Jordi Cortadella |
| 1997 | DATE | Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev |
| 1997 | ICCAD | Decomposition and technology mapping of speed-independent circuits using Boolean relations. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev |
| 1997 | ISLPED | Exploiting the locality of memory references to reduce the address bus energy. | Enric Musoll, Toms Lang, Jordi Cortadella |
| 1996 | DAC | Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev |
| 1996 | DATE | Optimizing CMOS Circuits for Low Power Using Transistor Reordering. | Enric Musoll, Jordi Cortadella |
| 1996 | DATE | Structural Methods for the Synthesis of Speed-Independent Circuits. | Enric Pastor, Oriol Roig, Jordi Cortadella, Alex Kondratyev |
| 1996 | EuroPar | RESIS: A New Methodology for Register Optimization in Software Pipelining. | Fermn Snchez, Jordi Cortadella |
| 1995 | DATE | Checking signal transition graph implementability by symbolic BDD traversal. | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Enric Pastor, Oriol Roig, Alexandre Yakovlev |
| 1995 | ICCAD | Synthesizing Petri nets from state-based models. | Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev |
| 1995 | ISLPED | High-level synthesis techniques for reducing the activity of functional units. | Enric Musoll, Jordi Cortadella |
| 1993 | ARITH | Division with speculation of quotient digits. | Jordi Cortadella, Toms Lang |
| 1993 | ICCAD | Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs. | Enric Pastor, Jordi Cortadella |
| 1993 | ICCD | An Efficient Unique State Coding Algorithm for Signal Transition Graphs. | Enric Pastor, Jordi Cortadella |