| 2026 | ACNS | High-throughput Side-Channel-Protected Stream Cipher Hardware for 6G Systems. | Yuluan Cao, Cankun Zhao, Bohan Yang, Wenping Zhu, Hanning Wang, Min Zhu, Leibo Liu |
| 2026 | DATE | HAP: Accelerating DNNs with Resolution-Preserved Quantization by Harnessing Adaptive-Precision. | Erjing Luo, Xinkuang Geng, Honglan Jiang, Leibo Liu, Jie Han |
| 2025 | DAC | Chameleon-SAT: An Adaptive Boolean Satisfiability Accelerator Using Mixed-Signal In-Memory Computing for Versatile SAT Problems. | Iris Ying Chou, Hao Kong, Yi Huang, Jianfeng Zhu, Wenping Zhu, Shaojun Wei, Aoyang Zhang, Leibo Liu |
| 2025 | HPCA | EFFACT: A Highly Efficient Full-Stack FHE Acceleration Platform. | Yi Huang, Xinsheng Gong, Xiangyu Kong, Dibei Chen, Jianfeng Zhu, Wenping Zhu, Liangwei Li, Mingyu Gao, Shaojun Wei, Aoyang Zhang, Leibo Liu |
| 2025 | HPCA | Lincoln: Real-Time 50~100B LLM Inference on Consumer Devices with LPDDR-Interfaced, Compute-Enabled Flash Memory. | Weiyi Sun, Mingyu Gao, Zhaoshi Li, Aoyang Zhang, Iris Ying Chou, Jianfeng Zhu, Shaojun Wei, Leibo Liu |
| 2025 | MICRO | PointISA: ISA-Extensions for Efficient Point Cloud Analytics via Architecture and Algorithm Co-Design. | Meng Han, Liang Wang, Limin Xiao, Hao Zhang, Bowen Jiang, Xilong Xie, Jianfeng Zhu, Shaojun Wei, Leibo Liu |
| 2024 | ASPLOS | Harp: Leveraging Quasi-Sequential Characteristics to Accelerate Sequence-to-Graph Mapping of Long Reads. | Yichi Zhang, Dibei Chen, Gang Zeng, Jianfeng Zhu, Zhaoshi Li, Longlong Chen, Shaojun Wei, Leibo Liu |
| 2024 | DAC | QUQ: Quadruplet Uniform Quantization for Efficient Vision Transformer Inference. | Xinkuang Geng, Siting Liu, Leibo Liu, Jie Han, Honglan Jiang |
| 2023 | DAC | CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism. | Zhou Wang, Jingchuan Wei, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2023 | DAC | RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA. | Qidie Wu, Jiangyuan Gu, Youxu Lin, Boxiao Han, Hongjun He, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2023 | DAC | Mckeycutter: A High-throughput Key Generator of Classic McEliece on Hardware. | Yihong Zhu, Wenping Zhu, Chen Chen, Min Zhu, Zhengdong Li, Shaojun Wei, Leibo Liu |
| 2023 | ISCA | Orinoco: Ordered Issue and Unordered Commit with Non-Collapsible Queues. | Dibei Chen, Tairan Zhang, Yi Huang, Jianfeng Zhu, Yang Liu, Pengfei Gou, Chunyang Feng, Binghua Li, Shaojun Wei, Leibo Liu |
| 2023 | ISCA | MapZero: Mapping for Coarse-grained Reconfigurable Architectures with Reinforcement Learning and Monte-Carlo Tree Search. | Xiangyu Kong, Yi Huang, Jianfeng Zhu, Xingchen Man, Yang Liu, Chunyang Feng, Pengfei Gou, Minggui Tang, Shaojun Wei, Leibo Liu |
| 2023 | ISCA | FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction. | Yubin Qin, Yang Wang, Dazheng Deng, Zhiren Zhao, Xiaolong Yang, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2023 | ISCA | Shogun: A Task Scheduling Framework for Graph Mining Accelerators. | Yibo Wu, Jianfeng Zhu, Wenrui Wei, Longlong Chen, Liang Wang, Shaojun Wei, Leibo Liu |
| 2023 | MICRO | Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane. | Jinyi Deng, Xinru Tang, Jiahao Zhang, Yuxuan Li, Linyun Zhang, Boxiao Han, Hongjun He, Fengbin Tu, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2023 | MICRO | CASA: An Energy-Efficient and High-Speed CAM-based SMEM Seeding Accelerator for Genome Alignment. | Yi Huang, Lingkun Kong, Dibei Chen, Zhiyu Chen, Xiangyu Kong, Jianfeng Zhu, Konstantinos Mamouras, Shaojun Wei, Kaiyuan Yang, Leibo Liu |
| 2022 | DAC | Efficient access scheme for multi-bank based NTT architecture through conflict graph. | Xiangren Chen, Bohan Yang, Yong Lu, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2022 | DAC | Mixed-granularity parallel coarse-grained reconfigurable architecture. | Jinyi Deng, Linyun Zhang, Lei Wang, Jiawei Liu, Kexiang Deng, Shibin Tang, Jiangyuan Gu, Boxiao Han, Fei Xu, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2022 | DAC | MC-CIM: a reconfigurable computation-in-memory for efficient stereo matching cost computation. | Zhiheng Yue, Yabing Wang, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2022 | HPCA | Upward Packet Popup for Deadlock Freedom in Modular Chiplet-Based Systems. | Yibo Wu, Liang Wang, Xiaohang Wang, Jie Han, Jianfeng Zhu, Honglan Jiang, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2022 | HPCA | Atomic Dataflow based Graph-Level Workload Orchestration for Scalable DNN Accelerators. | Shixuan Zheng, Xianjue Zhang, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2022 | ISCA | CaSMap: agile mapper for reconfigurable spatial architectures by automatically clustering intermediate representations and scattering mapping process. | Xingchen Man, Jianfeng Zhu, Guihuan Song, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2021 | ASPDAC | Combining Memory Partitioning and Subtask Generation for Parallel Data Access on CGRAs. | Cheng Li, Jiangyuan Gu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2021 | ASPDAC | A Multiple-Precision Multiply and Accumulation Design with Multiply-Add Merged Strategy for AI Accelerating. | Song Zhang, Jiangyuan Gu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2021 | DAC | ADROIT: An Adaptive Dynamic Refresh Optimization Framework for DRAM Energy Saving In DNN Training. | Xinhan Lin, Liang Sun, Fengbin Tu, Leibo Liu, Xiangyu Li, Shaojun Wei, Shouyi Yin |
| 2021 | DATE | HeteroKV: A Scalable Line-rate Key-Value Store on Heterogeneous CPU-FPGA Platforms. | Haichang Yang, Zhaoshi Li, Jiawei Wang, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2021 | HPCA | FuseKNA: Fused Kernel Convolution based Accelerator for Deep Neural Networks. | Jianxun Yang, Zhao Zhang, Zhuangzhi Liu, Jing Zhou, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2021 | ISCA | ABC-DIMM: Alleviating the Bottleneck of Communication in DIMM-based Near-Memory Processing with Inter-DIMM Broadcast. | Weiyi Sun, Zhaoshi Li, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2020 | DAC | CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology. | Liang Wang, Leibo Liu, Xiaohang Wang, Jie Han, Chenchen Deng, Shaojun Wei |
| 2020 | DAC | STC: Significance-aware Transform-based Codec Framework for External Memory Access Reduction. | Feng Xiong, Fengbin Tu, Man Shi, Yang Wang, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2020 | FCCM | A High-performance Inference Accelerator Exploiting Patterned Sparsity in CNNs. | Ning Li, Leibo Liu, Shaojun Wei, Shouyi Yin |
| 2020 | ICASSP | PAGAN: A Phase-Adapted Generative Adversarial Networks for Speech Enhancement. | Peishuo Li, Zihang Jiang, Shouyi Yin, Dandan Song, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2020 | ISCA | GraphABCD: Scaling Out Graph Analytics with Asynchronous Block Coordinate Descent. | Yifan Yang, Zhaoshi Li, Yangdong Deng, Zhiwei Liu, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2020 | MICRO | CATCAM: Constant-time Alteration Ternary CAM with Scalable In-Memory Architecture. | Dibei Chen, Zhaoshi Li, Tianzhu Xiong, Zhiwei Liu, Jun Yang, Shouyi Yin, Shaojun Wei, Leibo Liu |
| 2020 | MICRO | TFE: Energy-efficient Transferred Filter-based Engine to Compress and Accelerate Convolutional Neural Networks. | Huiyu Mo, Leibo Liu, Wenjing Hu, Wenping Zhu, Qiang Li, Ang Li, Shouyi Yin, Jian Chen, Xiaowei Jiang, Shaojun Wei |
| 2019 | ASRU | Small-Footprint Keyword Spotting with Graph Convolutional Network. | Xi Chen, Shouyi Yin, Dandan Song, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2019 | DAC | L-MPC: A LUT based Multi-Level Prediction-Correction Architecture for Accelerating Binary-Weight Hourglass Network. | Hong Liu, Leibo Liu, Wenping Zhu, Qiang Li, Huiyu Mo, Shaojun Wei |
| 2019 | DAC | A General Pattern-Based Dynamic Compilation Framework for Coarse-Grained Reconfigurable Architectures. | Xingchen Man, Leibo Liu, Jianfeng Zhu, Shaojun Wei |
| 2019 | DAC | A 1.17 TOPS/W, 150fps Accelerator for Multi-Face Detection and Alignment. | Huiyu Mo, Leibo Liu, Wenping Zhu, Qiang Li, Hong Liu, Wenjing Hu, Yao Wang, Shaojun Wei |
| 2019 | FPGA | Constructing Concurrent Data Structures on FPGA with Channels. | Hui Yan, Zhaoshi Li, Leibo Liu, Shouyi Yin, Shaojun Wei |
| 2019 | ICCAD | ReDESK: A Reconfigurable Dataflow Engine for Sparse Kernels on Heterogeneous Platforms. | Kai Lu, Zhaoshi Li, Leibo Liu, Jiawei Wang, Shouyi Yin, Shaojun Wei |
| 2019 | ISCAS | A Reliable Physical Unclonable Function Based on Differential Charging Capacitors. | Hang Yuan, Wei Guo, Chip-Hong Chang, Yuan Cao, Shaojun Wei, Shouyi Yin, Chenchen Deng, Leibo Liu, Wei Ge, Fan Zhang |
| 2019 | MICRO | FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory. | Zhaoshi Li, Leibo Liu, Yangdong Deng, Jiawei Wang, Zhiwei Liu, Shouyi Yin, Shaojun Wei |
| 2018 | DAC | LCP: a layer clusters paralleling mapping method for accelerating inception and residual networks on FPGA. | Xinhan Lin, Shouyi Yin, Fengbin Tu, Leibo Liu, Xiangyu Li, Shaojun Wei |
| 2018 | DAC | An efficient kernel transformation architecture for binary- and ternary-weight neural network inference. | Shixuan Zheng, Yonggang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2018 | DATE | Adaptive approximation in arithmetic circuits: A low-power unsigned divider design. | Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han |
| 2018 | ISCA | RANA: Towards Efficient Neural Acceleration with Refresh-Optimized Embedded DRAM. | Fengbin Tu, Weiwei Wu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2018 | ISCAS | Bit-width Adaptive Accelerator Design for Convolution Neural Network. | Jianxin Guo, Shouyi Yin, Peng Ouyang, Fengbin Tu, Shibin Tang, Leibo Liu, Shaojun Wei |
| 2018 | ISCAS | An Energy Efficient JPEG Encoder with Neural Network Based Approximation and Near-Threshold Computing. | Zhihui Wang, Shouyi Yin, Fengbin Tu, Leibo Liu, Shaojun Wei |
| 2017 | ASPDAC | Energy-aware loops mapping on multi-vdd CGRAs without performance degradation. | Jiangyuan Gu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2017 | DAC | Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution. | Yanan Lu, Leibo Liu, Yangdong Deng, Jian Weng, Zhaoshi Li, Chenchen Deng, Shaojun Wei |
| 2017 | DAC | A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment. | Qiang Wang, Leibo Liu, Wenping Zhu, Huiyu Mo, Chenchen Deng, Shaojun Wei |
| 2017 | FCCM | Bit-Width Based Resource Partitioning for CNN Acceleration on FPGA. | Jianxin Guo, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2017 | FPGA | Joint Modulo Scheduling and Memory Partitioning with Multi-Bank Memory for High-Level Synthesis (Abstract Only). | Tianyi Lu, Shouyi Yin, Xianqing Yao, Zhicong Xie, Leibo Liu, Shaojun Wei |
| 2017 | FPGA | Learning Convolutional Neural Networks for Data-Flow Graph Mapping on Spatial Programmable Architectures (Abstract Only). | Shouyi Yin, Dajiang Liu, Lifeng Sun, Xinhan Lin, Leibo Liu, Shaojun Wei |
| 2017 | ISCA | Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware. | Zhaoshi Li, Leibo Liu, Yangdong Deng, Shouyi Yin, Yao Wang, Shaojun Wei |
| 2017 | ISCAS | Memory fartitioning-based modulo scheduling for high-level synthesis. | Tianyi Lu, Shouyi Yin, Xianqing Yao, Zhicong Xie, Leibo Liu, Shaojun Wei |
| 2017 | ISCAS | DFGNet: Mapping dataflow graph onto CGRA by a deep learning approach. | Shouyi Yin, Dajiang Liu, Lifeng Sun, Leibo Liu, Shaojun Wei |
| 2017 | SAC | Multi-CNN and decision tree based driving behavior evaluation. | Shouyi Yin, Jinjin Duan, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2016 | ASPDAC | Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures. | Xinhan Lin, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2016 | DAC | Data cache prefetching via context directed pattern matching for coarse-grained reconfigurable arrays. | Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei |
| 2016 | ICCAD | Multibank memory optimization for parallel data access in multiple data arrays. | Shouyi Yin, Zhicong Xie, Chenyue Meng, Leibo Liu, Shaojun Wei |
| 2016 | ICCAD | Joint loop mapping and data placement for coarse-grained reconfigurable architecture with multi-bank memory. | Shouyi Yin, Xianqing Yao, Tianyi Lu, Leibo Liu, Shaojun Wei |
| 2015 | ASPDAC | A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures. | Leibo Liu, Yu Ren, Chenchen Deng, Shouyi Yin, Shaojun Wei, Jie Han |
| 2015 | ASPDAC | Battery-aware mapping optimization of loop nests for CGRAs. | Yu Peng, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2015 | DAC | A 127 fps in full hd accelerator based on optimized AKAZE with efficiency and effectiveness for image feature extraction. | Guangli Jiang, Leibo Liu, Wenping Zhu, Shouyi Yin, Shaojun Wei |
| 2015 | DAC | Efficient memory partitioning for parallel data access in multidimensional arrays. | Chenyue Meng, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2015 | DAC | Acceleration of control flows on reconfigurable architecture with a composite method. | Junbin Wang, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei |
| 2015 | DATE | RNA: a reconfigurable architecture for hardware neural acceleration. | Fengbin Tu, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2015 | DATE | Joint affine transformation and loop pipelining for mapping nested loop on CGRAs. | Shouyi Yin, Dajiang Liu, Leibo Liu, Shaojun Wei, Yike Guo |
| 2015 | DATE | Cooperatively managing dynamic writeback and insertion policies in a last-level DRAM cache. | Shouyi Yin, Jiakun Li, Leibo Liu, Shaojun Wei, Yike Guo |
| 2015 | FPGA | A Mixed-Grained Reconfigurable Computing Platform for Multiple-Standard Video Decoding (Abstract Only). | Leibo Liu, Yingjie Victor Chen, Dong Wang, Min Zhu, Shouyi Yin, Shaojun Wei |
| 2015 | FPGA | REPROC: A Dynamically Reconfigurable Architecture for Symmetric Cryptography (Abstract Only). | Bo Wang, Leibo Liu |
| 2015 | FPGA | A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only). | Junbin Wang, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei |
| 2015 | FPGA | Cost-Effective Memory Architecture to Achieve Flexible Configuration and Efficient Data Transmission for Coarse-Grained Reconfigurable Array (Abstract Only). | Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei |
| 2015 | ICCAD | Acceleration of Nested Conditionals on CGRAs via Trigger Scheme. | Shouyi Yin, Pengcheng Zhou, Leibo Liu, Shaojun Wei |
| 2015 | ISCAS | Neural approximating architecture targeting multiple application domains. | Fengbin Tu, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2015 | ISCAS | A flexible and energy-efficient reconfigurable architecture for symmetric cipher processing. | Bo Wang, Leibo Liu |
| 2015 | WACV | A Multi-modal 2D + 3D Face Recognition Method with a Novel Local Feature Descriptor. | Xu Dai, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2014 | DATE | Extending lifetime of battery-powered coarse-grained reconfigurable computing platforms. | Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2014 | FCCM | Exploiting Outer Loop Parallelism of Nested Loop on Coarse-Grained Reconfigurable Architectures. | Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2014 | FIE | Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure. | Chenchen Deng, Leibo Liu, Zhaoshi Li, Shouyi Yin, Shaojun Wei |
| 2014 | FPL | Configuration approaches to improve computing efficiency of coarse-grained reconfigurable multimedia processor. | Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei |
| 2014 | ICPR | A FAST Extreme Illumination Robust Feature in Affine Space. | Peng Ouyang, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2014 | ISCAS | Map-reduce inspired loop parallelization on CGRA. | Shengjia Shao, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2014 | ISCAS | A parallel hardware architecture for fast integral image computing. | Yuchi Zhang, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei |
| 2014 | ISCAS | A 65 nm uneven-dual-core SoC based platform for multi-device collaborative computing. | Wenping Zhu, Leibo Liu, Shouyi Yin, Yuan Dong, Shaojun Wei, Eugene Y. Tang, Jiqiang Song, Jinzhan Peng |
| 2013 | DAC | Polyhedral model based mapping optimization of loop nests for CGRAs. | Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2013 | ISCAS | Implementation of multi-standard video decoding algorithms on a coarse-grained reconfigurable multimedia processor. | Leibo Liu, Yingjie Victor Chen, Shouyi Yin, Dong Wang, Xing Wang, Shaojun Wei, Li Zhou, Hao Lei, Peng Cao |
| 2013 | ISCAS | Affine transformations for communication and reconfiguration optimization of loops on CGRAs. | Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2013 | ISCAS | A VLSI architecture for enhancing the fault tolerance of NoC using quad-spare mesh topology and dynamic reconfiguration. | Yu Ren, Leibo Liu, Shouyi Yin, Qinghua Wu, Shaojun Wei, Jie Han |
| 2013 | ISCAS | An inductive-coupling interconnected application-specific 3D NoC design. | Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei |
| 2012 | ISCAS | Reducing configuration contexts for coarse-grained reconfigurable architecture. | Shouyi Yin, Chongyong Yin, Leibo Liu, Min Zhu, Yansheng Wang, Shaojun Wei |
| 2010 | ISCAS | Parallel implementation of computing-intensive decoding algorithms of H.264 on reconfigurable SoC. | Tongsheng Geng, Leibo Liu, Shouyi Yin, Min Zhu, Wen Jia, Shaojun Wei |
| 2010 | ISCAS | A VLSI design of sensor node for wireless image sensor network. | Renyan Zhou, Leibo Liu, Shouyi Yin, Ao Luo, Xinkai Chen, Shaojun Wei |
| 2010 | ISCAS | A reconfigurable multi-processor SoC for media applications. | Min Zhu, Leibo Liu, Shouyi Yin, Yansheng Wang, Wenjie Wang, Shaojun Wei |
| 2010 | NPC | User Behavior Pattern Analysis and Prediction Based on Mobile Phone Sensors. | Jiqiang Song, Eugene Tang, Leibo Liu |
| 2009 | ISCAS | A Fast-locking and Wide-range Reversible SAR DLL. | Lei Wang, Leibo Liu, Hongyi Chen |
| 2007 | ISCAS | Battery-Aware Variable Voltage Scheduling on Real-Time Multiprocessor Platforms. | Yufeng Xie, Leibo Liu, Rui Dai, Shaojun Wei |