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Lesley Shannon

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

37

Venues

11

Active years

2003–2024

Best venue rank

A*

Where they publish

Papers

37 indexed papers, newest first.

YearVenueTitleAuthors
2024ICCDA Semi Black-Box Adversarial Bit- Flip Attack with Limited DNN Model Information.Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2024IOLTSZOBNN: Zero-Overhead Dependable Design of Binary Neural Networks with Deliberately Quantized Parameters.Behnam Ghavami, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2023FCCMDesigning a configurable IEEE-compliant FPU that supports variable precision for soft processors.Chris Keilbart, Yuhui Gao, Martin Chua, Eric Matthews, Steven J. E. Wilton, Lesley Shannon
2022DATEFitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions.Behnam Ghavami, Mani Sadati, Zhenman Fang, Lesley Shannon
2022DSDA Majority-based Approximate Adder for FPGAs.Behnam Ghavami, Mahdi Sajedi, Mohsen Raji, Zhenman Fang, Lesley Shannon
2022DSDBlind Data Adversarial Bit-flip Attack against Deep Neural Networks.Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Zhenman Fang, Lesley Shannon
2021FPGALEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs.Behnam Ghavami, Seyed Milad Ebrahimi, Zhenman Fang, Lesley Shannon
2021FPGADemystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking.Alec Lu, Zhenman Fang, Weihua Liu, Lesley Shannon
2021FPLMAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework.Behnam Ghavami, Milad Ibrahimipour, Zhenman Fang, Lesley Shannon
2020FCCMExploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units in FPGA-Based Soft-Processors.Eric Matthews, Yuhui Gao, Lesley Shannon
2020ICCADAadam: A Fast, Accurate, and Versatile Aging-Aware Cell Library Delay Model using Feed-Forward Neural Network.Seyed Milad Ebrahimipour, Behnam Ghavami, Hamid Mousavi, Mohsen Raji, Zhenman Fang, Lesley Shannon
2019FCCMRethinking Integer Divider Design for FPGA-Based Soft-Processors.Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon
2018FCCMEvaluating the Performance Efficiency of a Soft-Processor, Variable-Length, Parallel-Execution-Unit Architecture for FPGAs Using the RISC-V ISA.Eric Matthews, Zavier Aguila, Lesley Shannon
2018FPLModular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories.Ameer M. S. Abdelhadi, Guy G. F. Lemieux, Lesley Shannon
2017DATEPerformance impacts and limitations of hardware memory access trace collection.Nicholas C. Doyle, Eric Matthews, Graham M. Holland, Alexandra Fedorova, Lesley Shannon
2017FPLTAIGA: A new RISC-V soft-processor framework enabling high performance CPU architectural features.Eric Matthews, Lesley Shannon
2015FCCMTechnology Scaling in FPGAs: Trends in Applications and Architectures.Lesley Shannon, Veronica Cojocaru, Cong Nguyen Dao, Philip Heng Wai Leong
2015FPGADesign Space Exploration of L1 Data Caches for FPGA-Based Multiprocessor Systems.Eric Matthews, Nicholas C. Doyle, Lesley Shannon
2014FPGAA methodology for identifying and placing heterogeneous cluster groups based on placement proximity data (abstract only).Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2014FPLIdentifying and placing heterogeneously-sized cluster groupings based on FPGA placement data.Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2013CECSupergenes in a genetic algorithm for heterogeneous FPGA placement.Peter Jamieson, Farnaz Gharibian, Lesley Shannon
2012FPLBio-inspired walking: A FPGA multicore system for a legged robot.Michael Henrey, Sean Edmond, Lesley Shannon, Carlo Menon
2012FPLPolyblaze: From one to many bringing the microblaze into the multicore era with Linux SMP support.Eric Matthews, Lesley Shannon, Alexandra Fedorova
2012MICROAmoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy.Snehasish Kumar, Hongzhou Zhao, Arrvindh Shriraman, Eric Matthews, Sandhya Dwarkadas, Lesley Shannon
2011ACSSCEvaluating the scalability of high-performance, Fourier-Domain Optical Coherence Tomography on GPGPUs and FPGAs.Lesley Shannon, Jian Li, Mohammad Reza Mohammadnia, Marinko Sarunic
2011FCCMFUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators.Aws Ismail, Lesley Shannon
2011FCCMScalable, High Performance Fourier Domain Optical Coherence Tomography: Why FPGAs and Not GPGPUs.Jian Li, Marinko Sarunic, Lesley Shannon
2010FCCMOdin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research.Peter Jamieson, Kenneth B. Kent, Farnaz Gharibian, Lesley Shannon
2010FPGAPredicting the performance of application-specific NoCs implemented on FPGAs.Jason Lee, Lesley Shannon
2010FPLFinding System-Level Information and Analyzing Its Correlation to FPGA Placement.Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2008FCCMFacilitating Processor-Based DPR Systems for non-DPR Experts.Edward Chen, William A. Gruver, Dorian Sabaz, Lesley Shannon
2006FPGAThe routability of multiprocessor network topologies in FPGAs.Manuel Saldaa, Lesley Shannon, Paul Chow
2006FPLA System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaa, Paul Chow
2005FCCMSimplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller.Lesley Shannon, Paul Chow
2005FPLLeveraging Reconfigurability in the Design Process.Lesley Shannon, Paul Chow
2004FPGAUsing reconfigurability to achieve real-time profiling for hardware/software codesign.Lesley Shannon, Paul Chow
2003FCCMStandardizing the Performance Assessment of Reconfigurable Processor Architectures.Lesley Shannon, Paul Chow