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Lionel Torres

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

61

Venues

14

Active years

1994–2025

Best venue rank

A*

Where they publish

Papers

61 indexed papers, newest first.

YearVenueTitleAuthors
2025RSPExploring Cache Policies on FPGA-Accelerated Simulations: Tradeoffs Between Usability and Simulation Speed.Soraya Mobaraki, Thierry Gil, Lionel Torres, David Novo
2024DATEMulti-Level Analysis of GPU Utilization in ML Training Workloads.Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo
2022DACPref-X: a framework to reveal data prefetching in commercial in-order cores.Quentin Huppert, Francky Catthoor, Lionel Torres, David Novo
2022DSDDemystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem.Paul Delestrac, Lionel Torres, David Novo
2021DATEMemory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation.Quentin Huppert, Timon Evenblij, Manu Perumkunnil, Francky Catthoor, Lionel Torres, David Novo
2020DATEA Universal Spintronic Technology based on Multifunctional Standardized Stack.Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat
2018DATEMain memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamati, Lionel Torres
2018DATEUsing multifunctional standardized stack as universal spintronic technology for IoT.Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frdrick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamati, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat
2017DATEEmbedded systems to high performance computing using STT-MRAM.Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau, Lionel Torres, Abdoulaye Gamati, Pascal Benoit, Gilles Sassatelli
2016ISCASQuantitative evaluation of reliability and performance for STT-MRAM.Liuyang Zhang, Aida Todri-Sanial, Wang Kang, Youguang Zhang, Lionel Torres, Yuanqing Cheng, Weisheng Zhao
2015DATEPotential applications based on NVM emerging technologies.Sophiane Senni, Raphael Martins Brum, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamati, Bruno Mussard
2014DACPower management through DVFS and dynamic body biasing in FD-SOI circuits.Yeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beign, Ivan Miro Panades, Pascal Benoit, Lionel Torres
2014ETSAging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs.Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost
2014FPLAging effects in FPGAs: an experimental analysis.Abdulazim Amouri, Florent Bruguier, Saman Kiamehr, Pascal Benoit, Lionel Torres, Mehdi Baradaran Tahoori
2014FPLMethod for dynamic power monitoring on FPGAs.Mohamad Najem, Pascal Benoit, Florent Bruguier, Gilles Sassatelli, Lionel Torres
2013CARDISPractical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks.Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine
2013DSDElectromagnetic Analysis on RSA Algorithm Based on RNS.Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine
2013ISCASTrends on the application of emerging nonvolatile memory to processors and programmable devices.Lionel Torres, Raphael Martins Brum, Luis Vitorio Cargnini, Gilles Sassatelli
2012DATEAmplitude demodulation-based EM analysis of different RSA implementations.Guilherme Perin, Lionel Torres, Pascal Benoit, Philippe Maurine
2012FPLSecURe DPR: Secure update preventing replay attacks for dynamic partial reconfiguration.Florian Devic, Lionel Torres, Jrmie Crenne, Benot Badrignans, Pascal Benoit
2011FPLOptimizing an Open-Source Processor for FPGAs: A Case Study.Lyonel Barthe, Luis Vitorio Cargnini, Pascal Benoit, Lionel Torres
2011FPLA New Process Characterization Method for FPGAs Based on Electromagnetic Analysis.Florent Bruguier, Pascal Benoit, Philippe Maurine, Lionel Torres
2011ISCASPredictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip.Gabriel Marchesan Almeida, Rmi Busseuil, Everton Alceu Carara, Nicolas Hebert, Sameer Varyani, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Fernando Gehm Moraes
2011ISCASEvaluation of a distributed fault handler method for MPSoC.Nicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres
2010CHESWhen Failure Analysis Meets Side-Channel Attacks.Jerome Di-Battista, Jean-Christophe Courrge, Bruno Rouzeyre, Lionel Torres, Philippe Perdu
2010DATEHeterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem.Camille Jalier, Didier Lattard, Ahmed Amine Jerraya, Gilles Sassatelli, Pascal Benoit, Lionel Torres
2010DATEDifferential Power Analysis enhancement with statistical preprocessing.Victor Lomn, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
2010FPLSurvey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs.Syed Zahid Ahmed, Gilles Sassatelli, Lionel Torres, Laurent Rouge
2010FPLInvestigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures.Lyonel Barthe, Pascal Benoit, Lionel Torres
2010FPLSecure Protocol Implementation for Remote Bitstream Update Preventing Replay Attacks on FPGA.Florian Devic, Lionel Torres, Benot Badrignans
2010ISCASFlexible and distributed real-time control on a 4G telecom MPSoC.Camille Jalier, Didier Lattard, Gilles Sassatelli, Pascal Benoit, Lionel Torres
2009DATEExploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor.Syed Zahid Ahmed, Julien Eydoux, Laurent Rouge, Jean-Baptiste Cuelle, Gilles Sassatelli, Lionel Torres
2009DATEEvaluation on FPGA of triple rail logic robustness against DPA and DEMA.Victor Lomn, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2009DATEDynamic and distributed frequency assignment for energy and latency constrained MP-SoC.Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres
2008ETSHierarchical Code Correction and Reliability Management in Embedded nor Flash Memories.Benot Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli
2008FPLSecure FPGA configuration architecture preventing system downgrade.Benot Badrignans, Reouven Elbaz, Lionel Torres
2008FPLA non-volatile run-time FPGA using thermally assisted switching MRAMS.Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune
2008FPLConvergence analysis of run-time distributed optimization on adaptive systems using game theory.Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres
2008FPLBio-inspiration helps computers: A new machine.Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2007CHESTEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks.Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin
2007DATEEvaluation of design for reliability techniques in embedded flash memories.Benot Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli
2007DDECSArchitecture for Highly Reliable Embedded Flash Memories.Benot Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli
2007FCCMRun-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs.Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes
2006DACA parallelized way to provide data encryption and integrity checking on a processor-memory bus.Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez
2006DDECSPE-ICE: Parallelized Encryption and Integrity Checking Engine.Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet
2006DDECSA Contextual Resources use: a Proof of Concept through the APACHES' Platform.Alex Ngouanga, Gilles Sassatelli, Lionel Torres, Andr Borin Soares, Altamiro Amadeu Susin
2006FPGAMagnetic tunnelling junction based FPGA.Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon
2006FPLA Leak Resistant Architecture Against Side Channel Attacks.Daniel Mesquita, Benot Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes
2005DATEHardware Engines for Bus Encryption: A Survey of Existing Techniques.Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud
2005FPGADynamic hardware multiplexing for coarse grain reconfigurable architectures.Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
2005FPLRun-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors.Pascal Benoit, Jrgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon
2005FPLMagnetic remanent memory structures for dynamically reconfigurable fine grain FPGA.Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli
2003FPLA Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny
2002DATEHighly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications.Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou, Gaston Cambon, Jrme Galy
2001ETFAAn embedded core for the 2D wavelet transform.Camille Diou, Lionel Torres, Michel Robert
2001FPLThe Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems.Gilles Sassatelli, Lionel Torres, Jrme Galy, Gaston Cambon, Camille Diou
2001RSPA Dynamically Reconfigurable Architecture for Embedded Systems.Gilles Sassatelli, Gaston Cambon, Jrme Galy, Lionel Torres
2000ICIPA Wavelet Core for Video Processing.Camille Diou, Lionel Torres, Michel Robert
1999RSPFast Prototyping: A Case Study - The JPEG Compression Algorithm.Sbastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1996FPLConcurrent Design of Hardware/Software Dedicated Systems.Sbastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1994FPLInfluence of Locig Block Layout Architecture on FPGA Performance.Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne