| 2018 | ITC | Online Scan Diagnosis : A Novel Approach to Volume Diagnosis. | I-De Huang, Pallav Gupta, Loganathan Lingappan, Vijay Gangaram |
| 2015 | ITC | Information-theoretic and statistical methods of failure log selection for improved diagnosis. | Sarmad Tanwir, Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan |
| 2013 | ETS | Test generation for circuits with embedded memories using SMT. | Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram |
| 2012 | VLSID | A Novel SMT-Based Technique for LFSR Reseeding. | Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram |
| 2012 | VTS | A SMT-based diagnostic test generation method for combinational circuits. | Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram |
| 2007 | VLSID | Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits. | Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha |
| 2006 | DATE | Test generation for combinational quantum cellular automata (QCA) circuits. | Pallav Gupta, Niraj K. Jha, Loganathan Lingappan |
| 2006 | VLSID | Improving the Performance of Automatic Sequential Test Generation by Targeting Hard-to-Test Faults. | Loganathan Lingappan, Niraj K. Jha |
| 2005 | VLSID | Heterogeneous and Multi-Level Compression Techniques for Test Volume Reduction in Systems-on-Chip. | Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar |
| 2005 | VTS | Unsatisfiability Based Efficient Design for Testability Solution for Register-Transfer Level Circuits. | Loganathan Lingappan, Niraj K. Jha |
| 2003 | ICCD | Test Generation for Non-separable RTL Controller-datapath Circuits using a Satisfiability based Approach. | Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha |