Mauro Olivieri
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
27
Venues
14
Active years
1992–2026
Best venue rank
A*
Where they publish
Papers
27 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ETS | Impact and Characterization of Single Event Failures in Hyperdimensional Computing Hardware Accelerator. | Marcello Barbirotta, Marco Angioli, Rocco Martino, Federico Frontera, Antonio Mastrandrea, Mauro Olivieri |
| 2026 | IOLTS | RAS Enhancement of ECC-Protected Vector Register File for the RISC-V Architecture via RERI-Compliant Interface. | Marcello Barbirotta, Nicasio Canino, Giovanni Mazzini, Mauro Olivieri, Daniele Rossi, Sergio Saponara |
| 2025 | DSD | Towards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 Project. | Giovanni Agosta, Marco Aldinucci, Andrea Bartolini, Laura Bellentani, Andrea Biagioni, Daniele Cesarini, Carlotta Chiarini, Iacopo Colonnelli, Pietro Delugas, Lev Denisov, Ottorino Frezza, Marco Grangetto, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Andrea Maslov, Mauro Olivieri, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Davide Rossi, Sergio Saponara, Antonio Sciarappa, Francesco Simula, Matteo Sonza Reorda, Massimo Torquati, Piero Vicini |
| 2025 | IJCCI | Innovative Techniques for Efficient Hyperdimensional Computing on Hardware: Enhance Accuracy and On-the-Fly Hypervector Generation. | Saeid Jamili, Sabereh Taghdisi Rastkar, Marco Angioli, Mauro Olivieri |
| 2025 | IJCNN | HD-CBBIN: A Lightweight Approach for Contextual Bandit Learning in Real-Time Applications. | Marco Angioli, Antonello Rosato, Marcello Barbirotta, Rocco Martino, Andrea Marcelli, Antonio Mastrandrea, Mauro Olivieri |
| 2024 | IJCNN | AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs. | Marco Angioli, Saeid Jamili, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Antonello Rosato, Mauro Olivieri |
| 2023 | HPCA | Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices. | Enrico Reggiani, Alessandro Pappalardo, Max Doblas, Miquel Moret, Mauro Olivieri, Osman Sabri Unsal, Adrin Cristal |
| 2022 | ASPLOS | BiSon-e: a lightweight and high-performance accelerator for narrow integer linear algebra computing on the edge. | Enrico Reggiani, Cristbal Ramrez Lazo, Roger Figueras Bagu, Adrin Cristal, Mauro Olivieri, Osman Sabri Unsal |
| 2018 | ISCAS | Characterizing noise pulse effects on the power consumption of idle digital cells. | Mauro Olivieri, Usman Khalid, Antonio Mastrandrea, Francesco Menichelli |
| 2015 | ISLPED | Message from the general chairs. | Luca Benini, Renu Mehra, Mauro Olivieri |
| 2014 | DSD | Combined Impact of NBTI Aging and Process Variations on Noise Margins of Flip-Flops. | Usman Khalid, Antonio Mastrandrea, Mauro Olivieri |
| 2011 | ISCAS | Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores. | Francesco Menichelli, Mauro Olivieri, Simone Smorfa |
| 2009 | DATE | Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip. | Francesco Paterna, Luca Benini, Andrea Acquaviva, Francesco Papariello, Giuseppe Desoli, Mauro Olivieri |
| 2006 | ISCAS | Side channel analysis resistant design flow. | Manfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti |
| 2005 | ISCAS | A novel CMOS logic style with data independent power consumption. | Manfred Josef Aigner, Stefan Mangard, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti |
| 2005 | ISCAS | Encoding circuits for low power optical on-chip communications. | Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli |
| 2005 | ISCAS | Circuit-level power efficiency investigation of advanced DSP architectures based on a specialized power modeling technique. | Mauro Olivieri, Mirko Scarana, Simone Smorfa |
| 2004 | CASES | A post-compiler approach to scratchpad mapping of code. | Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini, Mauro Olivieri |
| 2004 | DATE | A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design. | Francesco Menichelli, Mauro Olivieri, Luca Benini, Monica Donno, Labros Bisdounis |
| 2004 | ISCAS | Robust three-state PFD architecture with enhanced frequency acquisition capabilities. | Francesco Centurelli, Stefano Costi, Mauro Olivieri, Salvatore Pennisi, Alessandro Trifiletti |
| 2001 | ISCAS | An application specific multi-port RAM cell circuit for register renaming units in high speed microprocessors. | Alessandro De Gloria, Mauro Olivieri |
| 2001 | ISCAS | A genetic approach to the design space exploration of superscalar microprocessor architectures. | Mauro Olivieri |
| 2001 | ISCAS | An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores. | Mauro Olivieri, Alessandro Trifiletti |
| 1999 | ICCD | A Low-Power Microcontroller with on-Chip Self-Tuning Digital Clock-Generator for Variable-Load Applications. | Mauro Olivieri, Alessandro Trifiletti, Alessandro De Gloria |
| 1994 | PADS | An evaluation system for distributed-time VHDL simulation. | Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri |
| 1993 | MICRO | An analysis of dynamic scheduling techniques for symbolic applications. | Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri |
| 1992 | MICRO | A non-deterministic scheduler for a software pipelining compiler. | Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri |