Skip to content

Michael Gssel

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

56

Venues

12

Active years

1991–2022

Best venue rank

C

Where they publish

Papers

56 indexed papers, newest first.

YearVenueTitleAuthors
2022IOLTSA New Decoding Method for Double Error Correcting Cross Parity Codes.Georg Duchrau, Michael Gssel
2019IOLTSA New DEC/TED Code for Fast Correction of 2-Bit-Errors.Paul-Patrick Nordmann, Michael Gssel
2017IOLTSA new 3-bit burst-error correcting code.Alexander Klockmann, Georg Georgakos, Michael Gssel
2015GIMglichkeiten der Modellierung von Fehlern in MLC-Flash-Speichern durch Fehlergraphen.Gnther Nie, Thomas Kern, Michael Gssel
2014ETSTriple error detection for Imai-Kamiyanagi codes based on subsyndrome computations.Christian Badack, Michael Gssel
2014IOLTSModified DEC BCH codes for parallel correction of 3-bit errors comprising a pair of adjacent errors.Christian Badack, Thomas Kern, Michael Gssel
2014IOLTSImproved circuitry for soft error correction in combinational logic in pipelined designs.Milos Krstic, Stefan Weidling, Vladimir Petrovic, Michael Gssel
2013DDECSA new method for correcting time and soft errors in combinational circuits.Egor S. Sogomonyan, Stefan Weidling, Michael Gssel
2013DSDError Correction of Transient Errors in a Sum-Bit Duplicated Adder by Error Detection.Stefan Weidling, Egor S. Sogomonyan, Michael Gssel
2011DDECSImplementation of Selective Fault Tolerance with conventional synthesis tools.Michael Augustin, Michael Gssel, Rolf Kraemer
2011IOLTSSelective fault tolerance for finite state machines.Michael Augustin, Michael Gssel, Rolf Kraemer
2010IOLTSReducing the area overhead of TMR-systems by protecting specific signals.Michael Augustin, Michael Gssel, Rolf Kraemer
2009ETSDoubling Test Cell Throughput by On-Loadboard Hardware- Implementation and Experience in a Production Environment.Frank-Uwe Faber, Matthias Beck, Markus Rudack, Olivier Barondeau, Thomas Rabenalt, Michael Gssel, Andreas Leininger
2009ETSMasking of X-values by Use of a Hierarchically Configurable Register.Thomas Rabenalt, Michael Gssel, Andreas Leininger
2009IOLTSConcurrent checking with split-parity codes.Michael Richter, Michael Gssel
2008ETSAccelerated Shift Registers for X-tolerant Test Data Compaction.Martin Hilscher, Michael Braun, Michael Richter, Andreas Leininger, Michael Gssel
2008IOLTSNew Linear SEC-DED Codes with Reduced Triple Bit Error Miscorrection Probability.Michael Richter, Klaus Oberlnder, Michael Gssel
2007ITCUsing timing flexibility of automatic test equipment to complement X-tolerant test compression techniques.Andreas Leininger, Martin Fischer, Michael Richter, Michael Gssel
2006DATETest set enrichment using a probabilistic fault model and the theory of output deviations.Zhanglei Wang, Krishnendu Chakrabarty, Michael Gssel
2006ETSOn-Chip Evaluation, Compensation, and Storage of Scan Diagnosis Data - A Test Time Efficient Scan Diagnosis Architecture.Frank Poehl, Jan Rzeha, Matthias Beck, Michael Gssel, Ralf Arnold, Peter Ossimitz
2006IOLTSA New Self-Checking and Code-Disjoint Non-Restoring Array Divider.Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gssel
2005IOLTSOn-Line Error Detection and BIST for the AES Encryption Algorithm with Different S-Box Implementations.Vitalij Ocheretnij, G. Kouznetsov, Ramesh Karri, Michael Gssel
2004DATEDiagnosis of Scan-Chains by Use of a Configurable Signature Register and Error-Correcting Code.Andreas Leininger, Michael Gssel, Peter Muhmenthaler
2004DATEA New Self-Checking Sum-Bit Duplicated Carry-Select Adder.Egor S. Sogomonyan, Daniel Marienfeld, Vitalij Ocheretnij, Michael Gssel
2004ETSA new self-checking multiplier by use of a code-disjoint sum-bit duplicated adder.Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gssel
2004IOLTSSelf-Checking Code-Disjoint Carry-Select Adder with Low Area Overhead by Use of Add1-Circuits.Vitalij Ocheretnij, Daniel Marienfeld, Egor S. Sogomonyan, Michael Gssel
2004IOLTSNecessary and Sufficient Conditions for the Existence of Totally Self-Checking Circuits.Valerij V. Saposhnikov, Vladimir V. Saposhnikov, Andrej A. Morosov, Michael Gssel
2004ITCLow Cost Concurrent Error Detection for the Advanced Encryption Standard.Kaijie Wu, Ramesh Karri, Grigori Kuznetsov, Michael Gssel
2003CHESParity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers.Ramesh Karri, Grigori Kuznetsov, Michael Gssel
2003IOLTSSynthesis of Low-Cost Parity-Based Partially Self-Checking Circuits.Kartik Mohanram, Egor S. Sogomonyan, Michael Gssel, Nur A. Touba
2003IOLTSA Modulo p Checked Self-Checking Carry Select Adder.Vitalij Ocheretnij, Michael Gssel, Egor S. Sogomonyan, Daniel Marienfeld
2003ITCParity-Based Concurrent Error Detection in Symmetric Block Ciphers.Ramesh Karri, Grigori Kuznetsov, Michael Gssel
2002DATEAn Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment.Chunsheng Liu, Krishnendu Chakrabarty, Michael Gssel
2002IOLTSA New Self-Checking Code-Disjoint Carry-Skip Adder.Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gssel
2002VTSScan-Path with Directly Duplicated and Inverted Duplicated Registers.Michael Gssel, Egor S. Sogomonyan, Adit D. Singh
2001ASPDACSynthesis of single-output space compactors with application to scan-based IP cores.Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gssel, Krishnendu Chakrabarty
2001IOLTSCode-Disjoint Carry-Dependent Sum Adder with Partial Look-Ahead.Vitalij Ocheretnij, Michael Gssel, Egor S. Sogomonyan
2001VTSDesign of Parameterizable Error-Propagating Space Compactors for Response Observation.Andrej A. Morosov, Michael Gssel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2001VTSEarly Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging.Egor S. Sogomonyan, Andrej A. Morosov, Jan Rzeha, Michael Gssel, Adit D. Singh
2000IOLTSLow Cost Concurrent Error Detection Based on Modulo Weight-Based Codes.Debaleena Das, Nur A. Touba, Markus Seuring, Michael Gssel
2000IOLTSA New Method for Concurrent Checking by Use of a 1-out-of-4 Code.Michael Gssel, Alexej Dmitriev, Vladimir V. Saposhnikov, Valerij V. Saposhnikov
2000IOLTSNew Self-Checking Circuits by Use of Berger-Codes.Andrej A. Morosov, Valerij V. Saposhnikov, Vladimir V. Saposhnikov, Michael Gssel
2000VLSIDZero-Aliasing Space Compression using a Single Periodic Output and its Application to Testing of Embedded Cores.Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gssel
1999ITCTestability evaluation of sequential designs incorporating the multi-mode scannable memory element.Adit D. Singh, Egor S. Sogomonyan, Michael Gssel, Markus Seuring
1999VTSA New Totally Error Propagating Compactor for Arbitrary Cores with Digital Interfaces.Michael Gssel, Andrej A. Morosov, Egor S. Sogomonyan
1998DATEBuilt-In Self-Test with an Alternating Output.T. Bogue, Michael Gssel, Helmut Jrgensen, Yervant Zorian
1998VTSA Structural Approach for Space Compaction for Concurrent Checking and BIST.Markus Seuring, Michael Gssel, Egor S. Sogomonyan
1998VTSA Multi-Mode Scannable Memory Element for High Test Application Efficiency and Delay Testing.Egor S. Sogomonyan, Adit D. Singh, Michael Gssel
1997VTSA linear code-preserving signature analyzer COPMISR.Andrzej Hlawiczka, Michael Gssel, Egor S. Sogomonyan
1996VTSSelf-dual parity checking-A new method for on-line testing.Vladimir V. Saposhnikov, Alexej Dmitriev, Michael Gssel, Valerij V. Saposhnikov
1996VTSConcurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems.Egor S. Sogomonyan, Michael Gssel
1995ASPDACBIST with negligible aliasing through random cover circuits.T. Bogue, Helmut Jrgensen, Michael Gssel
1994EDCCDetection of Permanent Hardware Faults of a Floating Point Adder by Pseudoduplication.Stefan Gerber, Michael Gssel
1994VTSCode disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design.Michael Gssel, Egor S. Sogomonyan
1992VTSSelf-testing and self-checking combinational circuits with weakly independent outputs.Egor S. Sogomonyan, Michael Gssel
1991VTSPseudoduplication of floating-point addition. A method of compiler generated checking of permanent hardware faults.Wolfgang Hahn, Michael Gssel