| 2025 | VLSID | Effective Memory Management and Sparse Aware Cache for Row-Wise Sparse CNNs. | MC Balasubramaniam, Basava Naga Girish Koneru, Nitin Chandrachoodan |
| 2025 | VLSID | Hardware Implementation of Blind Decoding of Downlink Control Information for 5G. | Y. Anu rajarajeswari, Nitin Chandrachoodan, Anji Babu Vadapalli, J. Klutto Milleth |
| 2023 | CASES | Work-in-Progress: QRCNN: Scalable CNNs. | Dara Nagaraju, Nitin Chandrachoodan |
| 2023 | ISCAS | ViTA: A Vision Transformer Inference Accelerator for Edge Applications. | Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, Peter A. Beerel |
| 2022 | HiPC | Split-Knit Convolution: Enabling Dense Evaluation of Transpose and Dilated Convolutions on GPUs. | Arjun Menon Vadakkeveedu, Debabrata Mandal, Pradeep Ramachandran, Nitin Chandrachoodan |
| 2022 | ISLPED | Layerwise Disaggregated Evaluation of Spiking Neural Networks. | Abinand Nallathambi, Sanchari Sen, Anand Raghunathan, Nitin Chandrachoodan |
| 2020 | DSN | Depending on HTTP/2 for Privacy? Good Luck! | Gargi Mitra, Prasanna Karthik Vairam, Patanjali SLPSK, Nitin Chandrachoodan, Kamakoti Veezhinathan |
| 2020 | FCCM | EASpiNN: Effective Automated Spiking Neural Network Evaluation on FPGA. | Sathish Panchapakesan, Zhenman Fang, Nitin Chandrachoodan |
| 2020 | ISCAS | Energy Reduction in Turbo Decoding through Dynamically Varying Bit-Widths. | Sundarrajan Rangachari, Nitin Chandrachoodan |
| 2019 | DATE | Data Subsetting: A Data-Centric Approach to Approximate Computing. | Younghoon Kim, Swagath Venkataramani, Nitin Chandrachoodan, Anand Raghunathan |
| 2019 | SIGCOMM | White Mirror: Leaking Sensitive Information from Interactive Netflix Movies using Encrypted Traffic Analysis. | Gargi Mitra, Prasanna Karthik Vairam, Patanjali SLPSK, Nitin Chandrachoodan, Kamakoti Veezhinathan |
| 2018 | DATE | Optimizing power-accuracy trade-off in approximate adders. | D. Celia, Vinita Vasudevan, Nitin Chandrachoodan |
| 2018 | HiPC | Lossless Parallel Implementation of a Turbo Decoder on GPU. | Karthikeyan Natarajan, Nitin Chandrachoodan |
| 2018 | ISCAS | Probabilistic Error Modeling for Two-part Segmented Approximate Adders. | D. Celia, Vinita Vasudevan, Nitin Chandrachoodan |
| 2017 | FPGA | FPGA Implementation of Non-Uniform DFT for Accelerating Wireless Channel Simulations (Abstract Only). | Srinivas Siripurapu, Aman Gayasen, Padmini Gopalakrishnan, Nitin Chandrachoodan |
| 2015 | ICCAD | iitRACE: A Memory Efficient Engine for Fast Incremental Timing Analysis and Clock Pessimism Removal. | Chaitanya Peddawad, Aman Goel, B. Dheeraj, Nitin Chandrachoodan |
| 2014 | VLSID | Scalable Low Power FFT/IFFT Architecture with Dynamic Bit Width Configurability. | Sundarrajan Rangachari, Jaiganesh Balakrishnan, Nitin Chandrachoodan |
| 2013 | DAC | Speeding up computation of the max/min of a set of gaussians for statistical timing analysis and optimization. | Vimitha A. Kuruvilla, Debjit Sinha, Jeff Piaget, Chandu Visweswariah, Nitin Chandrachoodan |
| 2013 | ETS | PinPoint: An algorithm for enhancing diagnostic resolution using capture cycle power information. | Seetal Potluri, Satya Trinadh, Roopashree Baskaran, Nitin Chandrachoodan, V. Kamakoti |
| 2013 | ISCAS | Scalable low power digital filter architectures for varying input dynamic range. | Sundarrajan Rangachari, Nitin Chandrachoodan |
| 2013 | VLSID | Tutorial T1B: Riding the "Energy Consumption Horse" - from System-level Design to Silicon. | Prabhat Avasare, Nitin Chandrachoodan |
| 2012 | ACSSC | A GPU implementation of belief propagation decoder for polar codes. | Bharath Kumar Reddy L., Nitin Chandrachoodan |
| 2012 | VLSID | GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio Applications. | Dhiraj Reddy Nallapa Yoge, Nitin Chandrachoodan |
| 2009 | VLSID | Efficient Implementation of Floating-Point Reciprocator on FPGA. | Manish Kumar Jaiswal, Nitin Chandrachoodan |
| 2008 | VLSID | Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models. | Aman Kokrady, C. P. Ravikumar, Nitin Chandrachoodan |
| 2007 | FPL | A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation. | Karthick Parashar, Nitin Chandrachoodan |
| 2001 | ICASSP | An efficient timing model for hardware implementation of multirate dataflow graphs. | Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu |
| 2001 | ISCAS | Adaptive negative cycle detection in dynamic graphs. | Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu |
| 2001 | ISCAS | The hierarchical timing pair model. | Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu |
| 1999 | ISCAS | VLSI architecture and design for high performance adaptive video scaling. | Arun Raghupathy, Pohsiang Hsu, K. J. Ray Liu, Nitin Chandrachoodan |