Shekhar Borkar

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

Venues

Active years

1988–2021

Best venue rank

Where they publish

Papers

35 indexed papers, newest first.

Year	Venue	Title	Authors
2021	ICCAD	Security Closure of Physical Layouts ICCAD Special Session Paper.	Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri
2014	ASPDAC	Resiliency for many-core system on a chip.	Tanay Karnik, James W. Tschanz, Nitin Borkar, Jason Howard, Sriram R. Vangal, Vivek De, Shekhar Borkar
2013	DAC	Power management and delivery for high-performance microprocessors.	Tanay Karnik, Mondira (Mandy) Deb Pant, Shekhar Borkar
2013	HPCA	Runnemede: An architecture for Ubiquitous High-Performance Computing.	Nicholas P. Carter, Aditya Agrawal, Shekhar Borkar, Romain Cledat, Howard David, Dave Dunning, Joshua B. Fryman, Ivan Ganev, Roger A. Golliver, Rob C. Knauerhase, Richard Lethin, Benot Meister, Asit K. Mishra, Wilfred R. Pinfold, Justin Teller, Josep Torrellas, Nicolas Vasilache, Ganesh Venkatesh, Jianping Xu
2012	DAC	Near-threshold voltage (NTV) design: opportunities and challenges.	Himanshu Kaul, Mark A. Anders, Steven Hsu, Amit Agarwal, Ram Krishnamurthy, Shekhar Borkar
2011	DAC	3D integration for energy efficient system design.	Shekhar Borkar
2009	DAC	Design perspectives on 22nm CMOS and beyond.	Shekhar Borkar
2008	DAC	Custom is from Venus and synthesis from Mars.	Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye
2007	DAC	Thousand Core ChipsA Technology Perspective.	Shekhar Borkar
2007	DATE	Microprocessors in the era of terascale integration.	Shekhar Borkar, Norman P. Jouppi, Per Stenstrm
2007	ISLPED	Future of on-chip interconnection architectures.	Shekhar Borkar, William J. Dally
2006	DAC	Electronics beyond nano-scale CMOS.	Shekhar Borkar
2006	DAC	Tomorrow's analog: just dead or just different?	Shekhar Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles G. Sodini
2005	IOLTS	Self Calibrating Circuit Design for Variation Tolerant VLSI Systems.	Chris H. Kim, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar, Kaushik Roy
2005	ISLPED	An 8.3GHz dual supply/threshold optimized 32b integer ALU-register file loop in 90nm CMOS.	Steven Hsu, Amit Agarwal, Kaushik Roy, Ram Krishnamurthy, Shekhar Borkar
2005	VLSID	VLSI Design Challenges for Gigascale Integration.	Shekhar Borkar
2004	DAC	Design and reliability challenges in nanometer technologies.	Shekhar Borkar, Tanay Karnik, Vivek De
2004	MICRO	Microarchitecture and Design Challenges for Gigascale Integration.	Shekhar Borkar
2003	DAC	Parameter variations and impact on circuits and microarchitecture.	Shekhar Borkar, Tanay Karnik, Siva G. Narendra, James W. Tschanz, Ali Keshavarzi, Vivek De
2003	DAC	Nanometer design: place your bets.	Andrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf
2003	ISLPED	Effectiveness and scaling trends of leakage control techniques for sub-130nm CMOS technologies.	Bhaskar Chatterjee, Manoj Sachdev, Steven Hsu, Ram Krishnamurthy, Shekhar Borkar
2002	DAC	Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.	Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
2002	DAC	Life is CMOS: why chase the life after?	George Sery, Shekhar Borkar, Vivek De
2002	ICCAD	Sub-90nm technologies: challenges and opportunities for CAD.	Tanay Karnik, Shekhar Borkar, Vivek De
2002	ISLPED	Full-chip sub-threshold leakage power prediction model for sub-0.18 m CMOS.	Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan
2001	ASPDAC	Low power design challenges for the decade (invited talk).	Shekhar Borkar
2001	DAC	Panel: Is Nanometer Design Under Control?	Andrew B. Kahng, Bing J. Sheu, Nancy Nettleton, John M. Cohn, Shekhar Borkar, Louis Scheffer, Ed Cheng, Sang Wang
2001	ISLPED	A low-leakage dynamic multi-ported register file in 0.13mm CMOS.	Atila Alvandpour, Ram Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Borkar
2001	ISLPED	Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs.	Ali Keshavarzi, Sean Ma, Siva G. Narendra, Brad Bloechel, K. Mistry, Tahir Ghani, Shekhar Borkar, Vivek De
2001	ISLPED	Scaling of stack effect and its application for leakage reduction.	Siva G. Narendra, Vivek De, Dimitri A. Antoniadis, Anantha P. Chandrakasan, Shekhar Borkar
2001	ISLPED	Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.	James W. Tschanz, Siva G. Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De
1999	ISLPED	Technology and design challenges for low power and high performance.	Vivek De, Shekhar Borkar
1999	ISLPED	Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's.	Ali Keshavarzi, Siva G. Narendra, Shekhar Borkar, Charles F. Hawkins, Kaushik Roy, Vivek De
1990	ISCA	Supporting Systolic and Memory Communciation in iWarp.	Shekhar Borkar, Robert Cohn, George W. Cox, Thomas R. Gross, H. T. Kung, Monica Lam, Margie Levine, Brian Moore, Wire Moore, Craig Peterson, Jim Susman, Jim Sutton, John Urbanski, Jon A. Webb
1988	SC	Warp: an integrated solution of high-speed parallel computing.	Shekhar Borkar, Robert Cohn, George W. Cox, Sha Gleason, Thomas R. Gross