| 2019 | DATE | CoDAPT: A Concurrent Data And Power Transceiver for Fully Wireless 3D-ICs. | Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak |
| 2019 | DATE | ACDC: An Accuracy- and Congestion-aware Dynamic Traffic Control Method for Networks-on-Chip. | Siyuan Xiao, Xiaohang Wang, Maurizio Palesi, Amit Kumar Singh, Terrence S. T. Mak |
| 2019 | ISLPED | A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration. | Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak |
| 2018 | DATE | A high-speed design methodology for inductive coupling links in 3D-ICs. | Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak |
| 2018 | DATE | Low-power 3D integration using inductive coupling links for neurotechnology applications. | Benjamin J. Fletcher, Shidhartha Das, Chi-Sang Poon, Terrence S. T. Mak |
| 2018 | DATE | Improving the efficiency of thermal covert channels in multi-/many-core systems. | Zijun Long, Xiaohang Wang, Yingtao Jiang, Guofeng Cui, Li Zhang, Terrence S. T. Mak |
| 2018 | ISCAS | Globally Wireless Locally Wired (GloWiLoW): A Clock Distribution Network for Many-Core Systems. | Qian Ding, Benjamin J. Fletcher, Terrence S. T. Mak |
| 2018 | VTS | Special session on bringing cores closer together: The wireless revolution in on-chip communication. | Terrence S. T. Mak, Hiroki Matsutani, Partha Pratim Pande |
| 2017 | FDL | Runtime task mapping for lifetime budgeting in many-core systems. | Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence S. T. Mak |
| 2016 | SBAC-PAD | An Efficient Channel Model for Evaluating Wireless NoC Architectures. | Michael Opoku Agyeman, Quoc-Tuan Vien, Gary Hill, Scott J. Turner, Terrence S. T. Mak |
| 2015 | ASPDAC | Fine-grained runtime power budgeting for networks-on-chip. | Xiaohang Wang, Tengfei Wang, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab |
| 2015 | DATE | Mixed wire and surface-wave communication fabrics for decentralized on-chip multicasting. | Ammar Karkar, Kin-Fai Tong, Terrence S. T. Mak, Alexandre Yakovlev |
| 2015 | FNC | An Improved Wireless Communication Fabric for Emerging Network-on-Chip Design. | Michael Opoku Agyeman, Kenneth Tong, Terrence S. T. Mak |
| 2015 | PDP | DeFrag: Defragmentation for Efficient Runtime Resource Allocation in NoC-Based Many-core Systems. | Jim Ng, Xiaohang Wang, Amit Kumar Singh, Terrence S. T. Mak |
| 2014 | ASPDAC | Agile frequency scaling for adaptive power allocation in many-core systems powered by renewable energy sources. | Xiaohang Wang, Zhiming Li, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Terrence S. T. Mak |
| 2014 | DATE | Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip. | Ammar Karkar, Nizar Dahir, Ra'ed Al-Dujaily, Kenneth Tong, Terrence S. T. Mak, Alex Yakovlev |
| 2014 | DATE | Adaptive power allocation for many-core systems inspired from multiagent auction model. | Xiaohang Wang, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Maurizio Palesi |
| 2014 | MICRO | A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI. | Jim Ng, Terrence S. T. Mak |
| 2014 | PDP | Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip. | Nizar Dahir, Ghaith Tarawneh, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev |
| 2013 | DASC | A Fault-Tolerant Routing Algorithm for NoC Using Farthest Reachable Routers. | Junshi Wang, Xiaohang Wang, Letian Huang, Terrence S. T. Mak, Guangjun Li |
| 2013 | ISCAS | Towards reliable hybrid bio-silicon integration using novel adaptive control system. | Junwen Luo, Patrick Degenaar, Graeme Coapes, Alex Yakovlev, Terrence S. T. Mak, Peter Andras |
| 2013 | MICRO | On multicast for dynamic and irregular on-chip networks using dynamic programming method. | Wen Zong, Xiaohang Wang, Terrence S. T. Mak |
| 2012 | FPL | A scalable FPGA-based design for field programmable large-scale ion channel simulations. | Graeme Coapes, Terrence S. T. Mak, Junwen Luo, Alex Yakovlev, Chi-Sang Poon |
| 2012 | FPL | Intra-chip physical parameter sensor for FPGAS using flip-flop metastability. | Ghaith Tarawneh, Terrence S. T. Mak, Alex Yakovlev |
| 2012 | MICRO | Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip. | Nizar Dahir, Ra'ed Al-Dujaily, Alex Yakovlev, Petros Missailidis, Terrence S. T. Mak |
| 2012 | MICRO | Surface wave communication system for on-chip and off-chip interconnects. | Ammar Karkar, Ra'ed Al-Dujaily, Alex Yakovlev, Kenneth Tong, Terrence S. T. Mak |
| 2011 | DATE | Run-time deadlock detection in networks-on-chip using coupled transitive closure networks. | Ra'ed Al-Dujaily, Terrence S. T. Mak, Fei Xia, Alexandre Yakovlev, Maurizio Palesi |
| 2011 | DATE | Redressing timing issues for speed-independent circuits in deep submicron age. | Yu Li, Terrence S. T. Mak, Alex Yakovlev |
| 2010 | FPL | A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis. | Bo Yu, Terrence S. T. Mak, Xiangyu Li, Fei Xia, Alexandre Yakovlev, Yihe Sun, Chi-Sang Poon |
| 2009 | ISCAS | Throughput Maximization for Wave-pipelined Interconnects using Cascaded Buffers and Transistor Sizing. | Li Wang, Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung |
| 2008 | FPGA | High-throughput interconnect wave-pipelining for global communication in FPGAs. | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk |
| 2007 | ISCAS | A Current-Mode Analog Circuit for Reinforcement Learning Problems. | Terrence S. T. Mak, Kai-Pui Lam, H. S. Ng, Guy Rachmuth, Chi-Sang Poon |
| 2006 | FPL | On-FPGA Communication Architectures and Design Factors. | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk |
| 2004 | FPL | FPGA-Based Computation for Maximum Likelihood Phylogenetic Tree Evaluation. | Terrence S. T. Mak, Kai-Pui Lam |
| 2004 | FPL | On Computing Maximum Likelihood Phylogeny Using FPGA p. | Terrence S. T. Mak, Kai-Pui Lam |