| 2026 | CCGRID | Breaking All-Reduce Bottlenecks with Asynchronous Influence Maximization at Scale. | Shubhendra Pal Singhal, Ajay Sharma Mandadi, Akihiro Hayashi, Thomas M. Conte, Vivek Sarkar |
| 2025 | ASPLOS | RASSM: Residue-based Acceleration of Single Sparse Matrix Computation via Adaptive Tiling. | Anirudh Jain, Pulkit Gupta, Thomas M. Conte |
| 2025 | CGO | ASDF: A Compiler for Qwerty, a Basis-Oriented Quantum Programming Language. | Austin J. Adams, Sharjeel Khan, Arjun S. Bhamra, Ryan R. Abusaada, Anthony M. Cabrera, Cameron C. Hoechst, Travis S. Humble, Jeffrey S. Young, Thomas M. Conte |
| 2025 | QCE | Qwerty: A Basis-Oriented Quantum Programming Language. | Austin J. Adams, Sharjeel Khan, Arjun S. Bhamra, Ryan R. Abusaada, Travis S. Humble, Jeffrey S. Young, Thomas M. Conte |
| 2025 | SIGCSE | A Blueprint for Q-CS1, an Introductory Quantum Programming Course. | Austin J. Adams, Rodrigo Borela, Jeffrey S. Young, Thomas M. Conte |
| 2020 | ICCD | Special Session: Exploring the Ultimate Limits of Adiabatic Circuits. | Michael P. Frank, Robert W. Brocato, Thomas M. Conte, Alexander H. Hsia, Anirudh Jain, Nancy A. Missert, Karpur Shukla, Brian D. Tierney |
| 2020 | OOPSLA | Intrepydd: performance, productivity, and portability for data science application kernels. | Tong Zhou, Jun Shirako, Anirudh Jain, Sriseshan Srikanth, Thomas M. Conte, Richard W. Vuduc, Vivek Sarkar |
| 2018 | HPCA | Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures. | Sriseshan Srikanth, Paul G. Rabbat, Eric R. Hein, Bobin Deng, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank |
| 2015 | ICCAD | Rebooting Computing and Low-Power Image Recognition Challenge. | Yung-Hsiang Lu, Alan M. Kadin, Alexander C. Berg, Thomas M. Conte, Erik P. DeBenedictis, Rachit Garg, Ganesh Gingade, Bichlien Hoang, Yongzhen Huang, Boxun Li, Jingyu Liu, Wei Liu, Huizi Mao, Junran Peng, Tianqi Tang, Elie K. Track, Jingqiu Wang, Tao Wang, Yu Wang, Jun Yao |
| 2013 | HPCA | High-speed formal verification of heterogeneous coherence hierarchies. | Jesse G. Beu, Jason A. Poovey, Eric R. Hein, Thomas M. Conte |
| 2012 | MASCOTS | Extrapolation Pitfalls When Evaluating Limited Endurance Memory. | Rishiraj A. Bheda, Jesse G. Beu, Brian P. Railing, Thomas M. Conte |
| 2012 | MASCOTS | Accelerating Multi-threaded Application Simulation through Barrier-Interval Time-Parallelism. | Paul D. Bryan, Jason A. Poovey, Jesse G. Beu, Thomas M. Conte |
| 2011 | MICRO | Manager-client pairing: a framework for implementing coherence hierarchies. | Jesse G. Beu, Michel C. Rosier, Thomas M. Conte |
| 2009 | MSWIM | On power and energy trends of IEEE 802.11n PHY. | Balaji V. Iyer, Thomas M. Conte |
| 2008 | ICCD | Energy-aware opcode design. | Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte |
| 2007 | ICCD | Combining cluster sampling with single pass methods for efficient sampling regimen design. | Paul D. Bryan, Thomas M. Conte |
| 2007 | ISPASS | Reverse State Reconstruction for Sampled Microarchitectural Simulation. | Paul D. Bryan, Michel C. Rosier, Thomas M. Conte |
| 2005 | ISPASS | Insight, not (random) numbers. | Thomas M. Conte |
| 2003 | ISCA | Detecting Global Stride Locality in Value Streams. | Huiyang Zhou, Jill Flanagan, Thomas M. Conte |
| 2003 | ICS | Enhancing memory level parallelism via recovery-free value prediction. | Huiyang Zhou, Thomas M. Conte |
| 2001 | HiPC | Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors. | Emre zer, Thomas M. Conte, Saurabh Sharma |
| 1999 | FPGA | Dynamically Programmable Cache Evaluation and Virtualization. | Mouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte |
| 1999 | MICRO | Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors. | Sergei Y. Larin, Thomas M. Conte |
| 1998 | ASPLOS | Value Speculation Scheduling for High Performance Processors. | Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte |
| 1998 | HPCA | Treegion Scheduling for Wide Issue Processors. | William A. Havanki, Sanjeev Banerjia, Thomas M. Conte |
| 1998 | MICRO | Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures. | Emre zer, Sanjeev Banerjia, Thomas M. Conte |
| 1997 | EuroPar | Treegion Scheduling for Highly Parallel Processors. | Sanjeev Banerjia, William A. Havanki, Thomas M. Conte |
| 1996 | ICCD | Reducing State Loss For Effective Trace Sampling of Superscalar Processors. | Thomas M. Conte, Mary Ann Hirsch, Kishore N. Menezes |
| 1996 | MICRO | Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings. | Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye |
| 1996 | MICRO | Accurate and Practical Profile-driven Compilation Using the Profile Buffer. | Thomas M. Conte, Kishore N. Menezes, Mary Ann Hirsch |
| 1996 | MICRO | A Persistent Rescheduled-page Cache for Low Overhead Object Code Compatibility in VLIW Architectures. | Thomas M. Conte, Sumedh W. Sathaye, Sanjeev Banerjia |
| 1996 | VLSID | Bipartitioning for Hybrid FPGA-Software Simulatio. | Ashutosh Singla, Thomas M. Conte |
| 1995 | ISCA | Optimization of Instruction Fetch Mechanisms for High Issue Rates. | Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills, Burzin A. Patel |
| 1995 | MICRO | Dynamic rescheduling: a technique for object code compatibility in VLIW architectures. | Thomas M. Conte, Sumedh W. Sathaye |
| 1994 | MICRO | Using branch handling hardware to support profile-driven optimization. | Thomas M. Conte, Burzin A. Patel, J. Stan Cox |
| 1993 | ICCD | Determining Cost-Effective Multiple Issue Processor Designs. | Thomas M. Conte, William H. Mangione-Smith |
| 1992 | MICRO | Tradeoffs in processor/memory interfaces for superscalar processors. | Thomas M. Conte |
| 1992 | RSP | Systematic prototyping of superscalar computer architectures. | Thomas M. Conte, Wen-mei W. Hwu |
| 1989 | ISCA | Comparing Software and Hardware Schemes For Reducing the Cost of Branches. | Wen-mei W. Hwu, Thomas M. Conte, Pohua P. Chang |
| 1989 | SIGMETRICS | A Simulation Study of Simultaneous Vector Prefetch Performance in Multiprocessor Memory Subsystems (Extended Abstract). | Wen-mei W. Hwu, Thomas M. Conte |