| 2025 | ICA3PP | A Parallel Implementation of ChaCha20 on MT-3000 Heterogeneous Multi-zone Processor. | Yongtao Luo, Jie Liu, Tun Li, Chunye Gong |
| 2025 | ICPP | COF: Cycle and transmission co-mapping framework for CNN mapping in PIM architecture. | Xianfa Zhou, Tun Li, Yuhuan Xia, Ruiyu Zhang |
| 2025 | ICS | IA-Chol: Input-Aware Cholesky Decomposition on CPU and GPU. | Jixiao Deng, Qinglin Wang, Lin Chen, Tun Li, Bo Yang, Xinhai Chen, Jie Liu |
| 2023 | ISCAS | Towards Accelerating Assertion Coverage Using Surrogate Logic Models. | Tun Li, Mingchuan Shi, Hongji Zou, Wanxia Qu |
| 2022 | DATE | Towards Implementing RTL Microprocessor Agile Design Using Feature Oriented Programming. | Hongji Zou, Mingchuan Shi, Tun Li, WanXia Qu |
| 2021 | FIE | On Enhancing Application-Ability Training in Discrete Mathematics. | Tun Li, Wanwei Liu, Liqian Chen, Xiaoguang Mao |
| 2021 | ISCAS | Symbolic Simulation Enhanced Coverage-Directed Fuzz Testing of RTL Design. | Tun Li, Hongji Zou, Dan Luo, WanXia Qu |
| 2020 | SETTA | Compiling FL | Wanwei Liu, Liangze Yin, Tun Li |
| 2013 | ASPDAC | Application specified soft error failure rate analysis using sequential equivalence checking techniques. | Tun Li, Dan Zhu, Sikun Li, Yang Guo |
| 2013 | ITiCSE | Introduction to programming: science or art? | Tun Li, Wanwei Liu, Xiaoguang Mao, Huiping Zhou |
| 2010 | FDL | Feature-Oriented Refactoring Proposal for Transaction Level Models in SoCLib. | Jun Ye, QingPing Tan, Tun Li, Bin Wu, Yuanru Meng |
| 2009 | FDL | The application of Aspectual Feature Module in the development and verification of SystemC models. | Jun Ye, Tun Li, QingPing Tan |
| 2007 | CSCWD | A Novel Collaborative Verification Environment for SoC Co-Verification. | Tun Li, Sikun Li, Jinshan Yu, Yang Guo |
| 2007 | CSCWD | Distributed Collaborative Partition Method of Reconfigurable SoC Using Ant Colony Optimization. | Sikun Li, Dawei Wang, Tun Li, Yong Dou |
| 2007 | CSCWD | Fast Panorama Unrolling of Catadioptric Omni-Directional Images for Cooperative Robot Vision System. | Zhihui Xiong, Maojun Zhang, Yunli Wang, Tun Li, Sikun Li |
| 2006 | EUC | Scheduling of Transactions Based on Extended Scheduling Timed Petri Nets for SoC System-Level Test-Case Generation. | Jinshan Yu, Tun Li, Yang Guo, QingPing Tan |
| 2005 | ASPDAC | Automatic functional test program generation for microprocessor verification. | Tun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li |
| 2005 | ATVA | Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming. | Tun Li, Yang Guo, Sikun Li, GongJie Liu |
| 2005 | DSD | Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. | Tun Li, Yang Guo, GongJie Liu, Sikun Li |
| 2005 | DSD | MA2TG: A Functional Test Program Generator for Microprocessor Verification. | Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li |
| 2004 | ASPDAC | Parallel verilog simulation: architecture and circuit partition. | Tun Li, Yang Guo, Sikun Li, Fujiang Ao, Gongjie Li |
| 2004 | ATVA | CLP Based Static Property Checking. | Tun Li, Yang Guo, Sikun Li |
| 2004 | VLSID | Design and Implementation of a Parallel Verilog Simulator: PVSim. | Tun Li, Yang Guo, Sikun Li |