| 2026 | VTS | WALET: SHAP-Guided Classification of Wafer-Level E-Test Variability for Early Manufacturing Risk Detection. | Ching-Yi Chang, Matthew Nigh, John M. Carulli, Yiorgos Makris |
| 2025 | ASPDAC | Efficient and Secure Cloud-based Split Logic Synthesis. | Chaitali Sathe, Yiorgos Makris, Benjamin Carrin Schfer |
| 2025 | FCCM | FREEDOM: FPGA-Based Hardware Redaction Emulator. | Chaital G. Sathe, Yiorgos Makris, Benjamin Carrion Schafer |
| 2025 | ICCAD | Unveiling the Mask: Trusted Semiconductor Manufacturing through Wafer-Level Mask-Set Attestation. | Suraag Sunil Tellakula, Ching-Yi Chang, Matthew Nigh, Christos Vasileiou, John M. Carulli, Yiorgos Makris |
| 2025 | ITC | An SMT-Based Method for Identifying State-Holding Elements in Extracted Netlists. | Aric Fowler, Carl Sechen, Yiorgos Makris |
| 2025 | ITC | Teaching Llamas to Test: A Language-Based Approach. | Christos Vasileiou, Yiorgos Makris |
| 2025 | VTS | Enhancing Metrology to E-test Correlation Model Accuracy through Process Expertise Integration. | Ching-Yi Chang, Matthew Nigh, John M. Carulli, Yiorgos Makris |
| 2024 | DAC | NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance. | Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu |
| 2024 | ITC | Generation and Quality Evaluation of Synthetic Process Control Monitoring Data. | Matthew Nigh, John M. Carulli, Yiorgos Makris |
| 2024 | VTS | On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. | N. Afroz, A. Sayem, Georgios Volanis, Dzmitry Maliuk, Haralampos-G. Stratigopoulos, Yiorgos Makris |
| 2024 | VTS | Testing a Transistor-Level Programmable Fabric: Challenges and Solutions. | Apurva Jain, Thomas Broadfoot, Carl Sechen, Yiorgos Makris |
| 2023 | DATE | Quo Vadis Signal? Automated Directionality Extraction for Post-Programming Verification of a Transistor-Level Programmable Fabric. | Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen |
| 2023 | DATE | MANTIS: Machine Learning-Based Approximate ModeliNg of RedacTed Integrated CircuitS. | Chaitali Sathe, Yiorgos Makris, Benjamin Carrion Schafer |
| 2023 | VTS | Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing. | V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, D. Webster, Amit Nahar, Yiorgos Makris |
| 2022 | DAC | A defect tolerance framework for improving yield. | Shiva Shankar Thiagarajan, Suriyaprakash Natarajan, Yiorgos Makris |
| 2022 | DATE | Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. | Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman |
| 2022 | ICIP | Efficient CNN-Based Super Resolution Algorithms for Mmwave Mobile Radar Imaging. | Christos Vasileiou, Josiah W. Smith, Shiva Thiagarajan, Matthew Nigh, Yiorgos Makris, Murat Torlak |
| 2022 | VTS | Machine Learning-Based Overkill Reduction through Inter-Test Correlation. | Deepika Neethirajan, V. A. Niranjan, Richard Willis, Amit Nahar, D. Webster, Yiorgos Makris |
| 2021 | DAC | Secure Logic Locking with Strain-Protected Nanomagnet Logic. | Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman |
| 2021 | ICCD | Functional Locking through Omission: From HLS to Obfuscated Design. | Zi Wang, Shayan Omais Mohammed, Yiorgos Makris, Benjamin Carrin Schfer |
| 2021 | VTS | Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation. | V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, E. De La Rosa, C. Alleyne, S. Mier, Yiorgos Makris |
| 2020 | DAC | DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY. | Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrin Schfer |
| 2020 | DATE | An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. | Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrin Schfer, Carl Sechen |
| 2020 | DATE | Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs. | Sai Govinda Rao Nimmalapudi, Georgios Volanis, Yichuan Lu, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris |
| 2020 | ISCAS | CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric. | Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris |
| 2020 | VTS | ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric. | Mustafa Munawar Shihab, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxiang Tian, Carl Sechen, Yiorgos Makris |
| 2019 | DATE | Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming. | Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrin Schfer, Carl Sechen, Yiorgos Makris |
| 2019 | DATE | Wafer-Level Adaptive Vmin Calibration Seed Forecasting. | Constantinos Xanthopoulos, Deepika Neethirajan, Sirish Boddikurapati, Amit Nahar, Yiorgos Makris |
| 2019 | ICCAD | Machine Learning-Based Hotspot Detection: Fallacies, Pitfalls and Marching Orders. | Gaurav Rajavendra Reddy, Kareem Madkour, Yiorgos Makris |
| 2019 | ICCD | Revisiting Capacitor-Based Trojan Design. | Mohammad-Mahdi Bidmeshki, Kiruba Sankaran Subramani, Yiorgos Makris |
| 2019 | IOLTS | Trusted and Secure Design of Analog/RF ICs: Recent Developments. | Kiruba S. Subramani, Georgios Volanis, Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris |
| 2019 | IOLTS | Automated Die Inking through On-line Machine Learning. | Constantinos Xanthopoulos, Arnold Neckermann, Paulus List, Klaus-Peter Tschernay, Peter Sarson, Yiorgos Makris |
| 2019 | ITC | Subtle Anomaly Detection of Microscopic Probes using Deep learning based Image Completion. | Kosuke Ikeda, Keith Schaub, Ira Leventhal, Yiorgos Makris, Constantinos Xanthopoulos, Deepika Neethirajan |
| 2019 | ITC | VIPER: A Versatile and Intuitive Pattern GenERator for Early Design Space Exploration. | Gaurav Rajavendra Reddy, Mohammad-Mahdi Bidmeshki, Yiorgos Makris |
| 2019 | VTS | Machine Learning-based Noise Classification and Decomposition in RF Transceivers. | Deepika Neethirajan, Constantinos Xanthopoulos, Kiruba S. Subramani, Keith Schaub, Ira Leventhal, Yiorgos Makris |
| 2019 | VTS | Analog Performance Locking through Neural Network-Based Biasing. | Georgios Volanis, Yichuan Lu, Sai Govinda Rao Nimmalapudi, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris |
| 2019 | VTS | Hardware-based Real-time Workload Forensics via Frame-level TLB Profiling. | Yunjie Zhang, Liwei Zhou, Yiorgos Makris |
| 2018 | DATE | Towards provably-secure performance locking. | Monir Zaman, Abhrajit Sengupta, Danqing Liu, Ozgur Sinanoglu, Yiorgos Makris, Jeyavijayan (JV) Rajendran |
| 2018 | DATE | Hardware-assisted rootkit detection via on-line statistical fingerprinting of process execution. | Liwei Zhou, Yiorgos Makris |
| 2018 | ITC | On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs. | Martin Andraud, Laura Isabel Galindez Olascoaga, Yichuan Lu, Yiorgos Makris, Marian Verhelst |
| 2018 | ITC | Hardware Dithering: A Run-Time Method for Trojan Neutralization in Wireless Cryptographic ICs. | Christiana Kapatsori, Yu Liu, Angelos Antonopoulos, Yiorgos Makris |
| 2018 | VTS | Special session on machine learning: How will machine learning transform test? | Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner |
| 2018 | VTS | Enhanced hotspot detection through synthetic pattern generation and design of experiments. | Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris |
| 2017 | DATE | Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP. | Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris |
| 2017 | DATE | A field programmable transistor array featuring single-cycle partial/full dynamic reconfiguration. | Jingxiang Tian, Gaurav Rajavendra Reddy, Jiajia Wang, William Swartz, Yiorgos Makris, Carl Sechen |
| 2017 | DATE | Hardware-based on-line intrusion detection via system call routine fingerprinting. | Liwei Zhou, Yiorgos Makris |
| 2017 | ETS | Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective. | Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris |
| 2017 | ICCAD | ACE: Adaptive channel estimation for detecting analog/RF trojans in WLAN transceivers. | Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris |
| 2017 | ISCAS | Wafer-level adaptive trim seed forecasting based on E-tests. | Constantinos Xanthopoulos, Ali Ahmadi, Sirish Boddikurapati, Amit Nahar, Bob Orr, Yiorgos Makris |
| 2017 | ITC | Automated die inking: A pattern recognition-based approach. | Constantinos Xanthopoulos, Peter Sarson, Heinz Reiter, Yiorgos Makris |
| 2017 | VTS | Knob non-idealities in learning-based post-production tuning of analog/RF ICs: Impact & remedies. | Yichuan Lu, Georgios Volanis, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris |
| 2017 | VTS | Foreword. | Yiorgos Makris, Srivaths Ravi, Amit Majumdar |
| 2016 | ICCAD | A machine learning approach to fab-of-origin attestation. | Ali Ahmadi, Mohammad-Mahdi Bidmeshki, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2016 | ICCD | Hardware-based attacks to compromise the cryptographic security of an election system. | Mohammad-Mahdi Bidmeshki, Gaurav Rajavendra Reddy, Liwei Zhou, Jeyavijayan Rajendran, Yiorgos Makris |
| 2016 | ISCAS | Harnessing fabrication process signature for predicting yield across designs. | Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2016 | ITC | Harnessing process variations for optimizing wafer-level probe-test flow. | Ali Ahmadi, Constantinos Xanthopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2016 | VTS | Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs. | Ali Ahmadi, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2016 | VTS | On-die learning-based self-calibration of analog/RF ICs. | Georgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris |
| 2015 | ICCAD | Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. | Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2015 | IOLTS | Workload characterization and prediction: A pathway to reliable multi-core systems. | Monir Zaman, Ali Ahmadi, Yiorgos Makris |
| 2015 | ISCAS | VeriCoq: A Verilog-to-Coq converter for proof-carrying hardware automation. | Mohammad-Mahdi Bidmeshki, Yiorgos Makris |
| 2015 | ITC | Concurrent hardware Trojan detection in wireless cryptographic ICs. | Yu Liu, Georgios Volanis, Ke Huang, Yiorgos Makris |
| 2015 | ITC | A comparative study of one-shot statistical calibration methods for analog / RF ICs. | Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Ke Huang, Yiorgos Makris |
| 2015 | VTS | Yield prognosis for fab-to-fab product migration. | Ali Ahmadi, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris |
| 2014 | DAC | Hardware Trojan Detection through Golden Chip-Free Statistical Side-Channel Fingerprinting. | Yu Liu, Ke Huang, Yiorgos Makris |
| 2014 | DATE | An analog non-volatile neural network platform for prototyping RF BIST solutions. | Dzmitry Maliuk, Yiorgos Makris |
| 2014 | ITC | Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. | Ali Ahmadi, Ke Huang, Suriyaprakash Natarajan, John M. Carulli Jr., Yiorgos Makris |
| 2014 | ITC | IC laser trimming speed-up through wafer-level spatial correlation modeling. | Constantinos Xanthopoulos, Ke Huang, Abbas Poonawala, Amit Nahar, Bob Orr, John M. Carulli Jr., Yiorgos Makris |
| 2013 | DATE | Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests. | Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris |
| 2013 | DATE | AVF-driven parity optimization for MBU protection of in-core memory arrays. | Michail Maniatakos, Maria K. Michael, Yiorgos Makris |
| 2013 | ETS | On combining alternate test with spatial correlation modeling in analog/RF ICs. | Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris |
| 2013 | ETS | Reconciling the IC test and security dichotomy. | Ozgur Sinanoglu, Naghmeh Karimi, Jeyavijayan Rajendran, Ramesh Karri, Yier Jin, Ke Huang, Yiorgos Makris |
| 2013 | ICCAD | A proof-carrying based framework for trusted microprocessor IP. | Yier Jin, Yiorgos Makris |
| 2013 | ICCAD | Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation. | Yu Liu, Yier Jin, Yiorgos Makris |
| 2013 | IOLTS | A post-deployment IC trust evaluation architecture. | Yier Jin, Dzmitry Maliuk, Yiorgos Makris |
| 2013 | IOLTS | Investigating the limits of AVF analysis in the presence of multiple bit errors. | Michail Maniatakos, Maria K. Michael, Yiorgos Makris |
| 2013 | ITC | Counterfeit electronics: A rising threat in the semiconductor manufacturing industry. | Ke Huang, John M. Carulli, Yiorgos Makris |
| 2013 | ITC | Process monitoring through wafer-level spatial variation decomposition. | Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris |
| 2013 | VTS | Innovative practices session 7C: Self-calibration & trimming. | Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake |
| 2012 | DATE | Post-deployment trust evaluation in wireless cryptographic ICs. | Yier Jin, Dzmitry Maliuk, Yiorgos Makris |
| 2012 | ICCAD | Spatial correlation modeling for probe test cost reduction in RF devices. | Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris |
| 2012 | ICCD | Exposing vulnerabilities of untrusted computing platforms. | Yier Jin, Michail Maniatakos, Yiorgos Makris |
| 2012 | ISCAS | A dual-mode weight storage analog neural network platform for on-chip applications. | Dzmitry Maliuk, Yiorgos Makris |
| 2012 | ITC | Spatial estimation of wafer measurement parameters using Gaussian process models. | Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris |
| 2012 | ITC | Integrated optimization of semiconductor manufacturing: A machine learning approach. | Nathan Kupp, Yiorgos Makris |
| 2012 | ITC | Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors. | Michail Maniatakos, Maria K. Michael, Yiorgos Makris |
| 2012 | VTS | Proof carrying-based information flow tracking for data secrecy protection and hardware trust. | Yier Jin, Yiorgos Makris |
| 2012 | VTS | Towards a fully stand-alone analog/RF BIST: A cost-effective implementation of a neural classifier. | Dzmitry Maliuk, Nathan Kupp, Yiorgos Makris |
| 2011 | DATE | Correlating inline data with final test outcomes in analog/RF devices. | Nathan Kupp, Mustapha Slamani, Yiorgos Makris |
| 2011 | ETS | AVF Analysis Acceleration via Hierarchical Fault Pruning. | Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
| 2011 | ICCAD | On proving the efficiency of alternative RF tests. | Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris |
| 2011 | ICCD | Is single-scheme Trojan prevention sufficient? | Yier Jin, Yiorgos Makris |
| 2011 | VTS | Exponent monitoring for low-cost concurrent error detection in FPU control logic. | Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer |
| 2010 | IOLTS | An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. | Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2010 | ITC | Post-production performance calibration in analog/RF devices. | Nathan Kupp, He Huang, Petros Drineas, Yiorgos Makris |
| 2010 | ITC | Analog neural network design for RF built-in self-test. | Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris |
| 2010 | VTS | Workload-driven selective hardening of control state elements in modern microprocessors. | Michail Maniatakos, Yiorgos Makris |
| 2009 | DATE | Enrichment of limited training sets in machine-learning-based analog/RF test. | Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris |
| 2009 | ICCD | Impact analysis of performance faults in modern microprocessors. | Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
| 2009 | VTS | Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. | Yiorgos Makris, Haralampos-G. D. Stratigopoulos |
| 2009 | VTS | Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
| 2008 | ETS | Confidence Estimation in Non-RF to RF Correlation-Based Specification Test Compaction. | Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
| 2008 | IOLTS | On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD. | Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris |
| 2008 | ITC | On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris |
| 2008 | VTS | A Statistical Approach to Characterizing and Testing Functionalized Nanowires. | James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris |
| 2007 | VTS | Non-RF to RF Test Correlation Using Learning Machines: A Case Study. | Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
| 2006 | DATE | Berger code-based concurrent error detection in asynchronous burst-mode machines. | Sobeeh Almukhaizim, Yiorgos Makris |
| 2006 | ICCAD | Testing delay faults in asynchronous handshake circuits. | Feng Shi, Yiorgos Makris |
| 2006 | ITC | Seamless Integration of SER in Rewiring-Based Design Space Exploration. | Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris |
| 2006 | VTS | Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2006 | VTS | Session Abstract. | Andreas G. Veneris, Yiorgos Makris |
| 2005 | ASPDAC | SPIN-PAC: test compaction for speed-independent circuits. | Feng Shi, Yiorgos Makris |
| 2005 | DATE | Concurrent Error Detection in Asynchronous Burst-Mode Controllers. | Sobeeh Almukhaizim, Yiorgos Makris |
| 2005 | ITC | Test generation for ultra-high-speed asynchronous pipelines. | Feng Shi, Yiorgos Makris, Steven M. Nowick, Montek Singh |
| 2005 | VTS | Constructive Derivation of Analog Specification Test Criteria. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2004 | DATE | On Concurrent Error Detection with Bounded Latency in FSMs. | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
| 2004 | ICCAD | SPIN-TEST: automatic test pattern generation for speed-independent circuits. | Feng Shi, Yiorgos Makris |
| 2004 | ICCD | Compiler-Based Frame Formation for Static Optimization. | Feng Shi, Sobeeh Almukhaizim, Pey-Chang Lin, Yiorgos Makris |
| 2004 | ITC | SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits. | Feng Shi, Yiorgos Makris |
| 2004 | VTS | Cost-Driven Selection of Parity Trees. | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
| 2003 | DATE | Non-Intrusive Concurrent Error Detection in FSMs through State/Output Compaction and Monitoring via Parity Trees. | Petros Drineas, Yiorgos Makris |
| 2003 | ICCD | Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. | Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris |
| 2003 | ICCD | Independent Test Sequence Compaction through Integer Programming. | Petros Drineas, Yiorgos Makris |
| 2003 | IOLTS | On Compaction-Based Concurrent Error Detection. | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
| 2003 | IOLTS | An Analog Checker With Input-Relative Tolerance for Duplicate Signals. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2003 | ITC | Concurrent Error Detection in Linear Analog Circuits Using State Estimation. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2003 | VLSID | SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs. | Petros Drineas, Yiorgos Makris |
| 2003 | VTS | An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2001 | VTS | Efficient Transparency Extraction and Utilization in Hierarchical Test. | Yiorgos Makris, Vishal Patel, Alex Orailoglu |
| 2000 | ETS | How to avoid random walks in hierarchical test path identification. | Yiorgos Makris, Jamison Collins, Alex Orailoglu |
| 2000 | ISCAS | Transparency-based hierarchical test generation for modular RTL designs. | Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah |
| 2000 | VTS | Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. | Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu |
| 1999 | DATE | Channel-Based Behavioral Test Synthesis for Improved Module Reachability. | Yiorgos Makris, Alex Orailoglu |
| 1998 | ITC | DFT guidance through RTL test justification and propagation analysis. | Yiorgos Makris, Alex Orailoglu |