Yu-Liang Wu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
41
Venues
12
Active years
1994–2023
Best venue rank
A*
Where they publish
Papers
41 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | CVPR | NTIRE 2023 Challenge on Efficient Super-Resolution: Methods and Results. | Yawei Li, Yulun Zhang, Radu Timofte, Luc Van Gool, Lei Yu, Youwei Li, Xinpeng Li, Ting Jiang, Qi Wu, Mingyan Han, Wenjie Lin, Chengzhi Jiang, Jinting Luo, Haoqiang Fan, Shuaicheng Liu, Yucong Wang, Minjie Cai, Mingxi Li, Yuhang Zhang, Xianjun Fan, Yankai Sheng, Yanyu Mao, Nihao Zhang, Qian Wang, Mingjun Zheng, Long Sun, Jinshan Pan, Jiangxin Dong, Jinhui Tang, Zhongbao Yang, Yan Wang, Erlin Pan, Qixuan Cai, Xinan Dai, Magauiya Zhussip, Nikolay Kalyazin, Dmitry Vyal, Xueyi Zou, Youliang Yan, Heaseo Chung, Jin Zhang, Gaocheng Yu, Feng Zhang, Hongbin Wang, Bohao Liao, Zhibo Du, Yu-Liang Wu, Gege Shi, Long Peng, Yang Wang, Yang Cao, Zhengjun Zha, Zhi-Kai Huang, Yi-Chung Chen, Yuan-Chun Chiang, Hao-Hsiang Yang, Wei-Ting Chen, Hua-En Chang, I-Hsiang Chen, Chia-Hsuan Hsieh, Sy-Yen Kuo, Xin Liu, Jiahao Pan, Hongyuan Yu, Weichen Yu, Lin Ge, Jiahua Dong, Yajun Zou, Zhuoyuan Wu, Binnan Han, Xiaolin Zhang, Heng Zhang, Xuanwu Yin, Kunlong Zuo, Weijian Deng, Hongjie Yuan, Zengtong Lu, Mingyu Ouyang, Wenzhuo Ma, Nian Liu, Hanyou Zheng, Yuantong Zhang, Junxi Zhang, Zhenzhong Chen, Garas Gendy, Nabil Sabor, Jingchao Hou, Guanghui He, Yurui Zhu, Xi Wang, Xueyang Fu, Zheng-Jun Zha, Daheng Yin, Mengyang Liu, Baijun Chen, Ao Li, Lei Luo, Kangjun Jin, Ce Zhu, Xiaoming Zhang, Chengxing Xie, Linze Li, Haiteng Meng, Tianlin Zhang, Tianrui Li, Xiaole Zhao, Zhao Zhang, Baiang Li, Huan Zheng, Suiyi Zhao, Yangcheng Gao, Jiahuan Ren, Kang Hu, Jingpeng Shi, Zhijian Wu, Dingjiang Huang, Jinchen Zhu, Hui Li, Qianru Xv, Tianle Liu, Gang Wu, Junpeng Jiang, Xianming Liu, Junjun Jiang, Mingjian Zhang, Shizhuang Weng, Jing Hu, Chengxu Wu, Qinrui Fan, Chengming Feng, Ziwei Luo, Shu Hu, Siwei Lyu, Xi Wu, Xin Wang |
| 2016 | ASPDAC | Coupling reverse engineering and SAT to tackle NP-complete arithmetic circuitry verification in ∼O(# of gates). | Yi Diao, Xing Wei, Tak-Kei Lam, Yu-Liang Wu |
| 2016 | ASPDAC | To Detect, Locate, and Mask Hardware Trojans in digital circuits by reverse engineering and functional ECO. | Xing Wei, Yi Diao, Yu-Liang Wu |
| 2015 | DATE | A coupling area reduction technique applying ODC shifting. | Yi Diao, Tak-Kei Lam, Xing Wei, Yu-Liang Wu |
| 2015 | DATE | A universal macro block mapping scheme for arithmetic circuits. | Xing Wei, Yi Diao, Tak-Kei Lam, Yu-Liang Wu |
| 2014 | VLSID | Delete and Correct (DaC): An Atomic Logic Operation for Removing Any Unwanted Wire. | Xing Wei, Tak-Kei Lam, Xiaoqing Yang, Wai-Chung Tang, Yi Diao, Yu-Liang Wu |
| 2013 | ASPDAC | Mountain-mover: An intuitive logic shifting heuristic for improving timing slack violating paths. | Xing Wei, Wai-Chung Tang, Yu-Liang Wu, Cliff C. N. Sze, Charles J. Alpert |
| 2012 | ASPDAC | ECO timing optimization with negotiation-based re-routing and logic re-structuring using spare cells. | Xing Wei, Wai-Chung Tang, Yi Diao, Yu-Liang Wu |
| 2012 | DATE | Almost every wire is removable: A modeling and solution for removing any circuit wire. | Xiaoqing Yang, Tak-Kei Lam, Wai-Chung Tang, Yu-Liang Wu |
| 2011 | ASPDAC | On applying erroneous clock gating conditions to further cut down power. | Tak-Kei Lam, Xiaoqing Yang, Wai-Chung Tang, Yu-Liang Wu |
| 2010 | COCOA | Structured Overlay Network for File Distribution. | Hongbing Fan, Yu-Liang Wu |
| 2010 | DAC | ECR: a low complexity generalized error cancellation rewiring scheme. | Xiaoqing Yang, Tak-Kei Lam, Yu-Liang Wu |
| 2010 | ISCAS | Improving redundancy addition and removal using unreachable states for sequential circuits. | Xiaoqing Yang, Zigang Xiao, Yu-Liang Wu |
| 2009 | COCOA | A New Approach for Rearrangeable Multicast Switching Networks. | Hongbing Fan, Yu-Liang Wu |
| 2008 | COCOA | Algorithms and Implementation for Interconnection Graph Problem. | Hongbing Fan, Christian Hundt, Yu-Liang Wu, Jason Ernst |
| 2008 | FPL | Customized Reconfigurable Interconnection Networks for multiple application SOCS. | Hongbing Fan, Jason Ernst, Yu-Liang Wu |
| 2007 | DAC | How Much Can Logic Perturbation Help from Netlist to Final Routing for FPGAs. | Catherine L. Zhou, Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu |
| 2007 | ISCAS | Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring. | Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu |
| 2005 | ASPDAC | Crossbar based design schemes for switch boxes and programmable interconnection networks. | Hongbing Fan, Yu-Liang Wu |
| 2005 | ISCAS | FPGA technology mapping optimization by rewiring algorithms. | Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu, Shih-Chieh Chang |
| 2004 | FPL | On Optimal Irregular Switch Box Designs. | Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jiping Liu |
| 2004 | VTS | A Dual-Mode Built-In Self-Test Technique for Capacitive MEMS Devices. | Xingguo Xiong, Yu-Liang Wu, Wen-Ben Jone |
| 2003 | ASPDAC | On improving FPGA routability applying multi-level switch boxes. | Jiping Liu, Hongbing Fan, Yu-Liang Wu |
| 2003 | DAC | A cost-effective scan architecture for scan testing with non-scan test power and test application cost. | Dong Xiang, Shan Gu, Jia-Guang Sun, Yu-Liang Wu |
| 2002 | FPL | On Optimum Designs of Universal Switch Blocks. | Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung |
| 2001 | ASPDAC | Combinatorial routing analysis and design of universal switch blocks. | Hongbing Fan, Jiping Liu, Yu-Liang Wu |
| 2001 | ASPDAC | Improved alternative wiring scheme applying dominator relationship. | Chin Ngai Sze, Yu-Liang Wu |
| 2001 | DAC | On Optimum Switch Box Designs for 2-D FPGAs. | Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung |
| 2001 | DATE | Further improve circuit partitioning using GBAW logic perturbation techniques. | Chak-Chung Cheung, Yu-Liang Wu, David Ihsin Cheng |
| 2000 | ASPDAC | IBAW: an implication-tree based alternative-wiring logic transformation algorithm. | Wangning Long, Yu-Liang Wu, Jinian Bian |
| 2000 | ASPDAC | Circuit partitioning with coupled logic restructuring techniques. | Yu-Liang Wu, Xiao-Long Yuan, David Ihsin Cheng |
| 2000 | ICCAD | General Models for Optimum Arbitrary-Dimension FPGA Switch Box Designs. | Hongbing Fan, Jiping Liu, Yu-Liang Wu |
| 2000 | VLSID | A Fast Graph-Based Alternative Wiring Scheme for Boolean Networks. | Yu-Liang Wu, Wangning Long, Hongbing Fan |
| 1999 | ASPDAC | On the Testing Quality of Random and Pseudo-random Sequences for Permanent and Intermittent Faults. | Jin Ding, Yu-Liang Wu |
| 1998 | ASPDAC | On the Optimal Sub-routing Structures of 2-D FPGA Greedy Routing Architectures. | Jiaofeng Pan, Yu-Liang Wu, C. K. Wong |
| 1998 | ICCD | On thin Boolean functions and related optimum OBDD ordering. | Yu-Liang Wu, Hongbing Fan, C. K. Wong |
| 1998 | ITC | A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits. | Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu-Liang Wu |
| 1997 | ASPDAC | Not necessarily more switches more routability [sic.]. | Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama |
| 1995 | ASPDAC | Routing on regular segmented 2-D FPGAs. | Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1995 | DAC | Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing. | Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1994 | ICCAD | On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution. | Yu-Liang Wu, Douglas Chang |