| 2009 | Automatic formal verification of clock domain crossing signals. | Bing Li, Chris Ka-Kei Kwok |
| 2009 | Post-routing redundant via insertion with wire spreading capability. | Cheok-Kei Lei, Po-Yi Chiang, Yu-Min Lee |
| 2009 | Compiler-managed register file protection for energy-efficient soft error reduction. | Jongeun Lee, Aviral Shrivastava |
| 2009 | Partial conflict-relieving programmable address shuffler for parallel memories in multi-core processor. | Young-Su Kwon, Bontae Koo, Nak-Woong Eum |
| 2009 | Mapping method for dynamically reconfigurable architecture. | Akira Kuroda, Mayuko Koezuka, Hidenori Matsuzaki, Takashi Yoshikawa, Shigehiro Asano |
| 2009 | Ultra low-power ANSI S1.11 filter bank for digital hearing aids. | Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chou-Kun Lin, Chih-Wei Liu |
| 2009 | A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level. | Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu |
| 2009 | CAD challenges for 3D ICs. | David S. Kung, Ruchir Puri |
| 2009 | Adaptive techniques for overcoming performance degradation due to aging in digital circuits. | Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar |
| 2009 | Three-dimensional integration technology and integrated systems. | Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka |
| 2009 | A fast longer path algorithm for routing grid with obstacles using biconnectivity based length upper bound. | Yukihide Kohira, Suguru Suehiro, Atsushi Takahashi |
| 2009 | Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang |
| 2009 | A low-jitter 1.5-GHz and large-EMI reduction 10-dBm spread-spectrum clock generator for Serial-ATA. | Takashi Kawamoto, Masaru Kokubo |
| 2009 | A wireless real-time on-chip bus trace system. | Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hiroki Ishikuro, Tadahiro Kuroda |
| 2009 | A current-mode DC-DC converter using a quadratic slope compensation scheme. | Chihiro Kawabata, Yasuhiro Sugimoto |
| 2009 | A software solution for dynamic stack management on scratch pad memory. | Arun Kannan, Aviral Shrivastava, Amit Pabalkar, Jongeun Lee |
| 2009 | A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management. | Tatsuya Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Ito, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, Shinichi Yoshioka |
| 2009 | An approach to the RF-LSI design for ubiquitous communication appliances. | Yuichi Kado, Mitsuru Harada |
| 2009 | A high performance LDPC decoder for IEEE802.11n standard. | Wen Ji, Yuta Abe, Takeshi Ikenaga, Satoshi Goto |
| 2009 | Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. | Kwangok Jeong, Andrew B. Kahng |
| 2009 | HitME: low power Hit MEmory buffer for embedded systems. | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic |
| 2009 | Designing and optimizing compute kernels on NVIDIA GPUs. | Damir A. Jamsek |
| 2009 | A stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories. | M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli |
| 2009 | RF-analog circuit design in scaled SoC. | Nobuyuki Itoh, Mototsugu Hamada |
| 2009 | A low-power FPGA based on autonomous fine-grain power-gating. | Shota Ishihara, Masanori Hariyama, Michitaka Kameyama |