| 2009 | Circuit design using stripe-shaped PMELA TFTs on glass. | Keita Ikai, Jinmyoung Kim, Makoto Ikeda, Kunihiro Asada |
| 2009 | Stochastic thermal simulation considering spatial correlated within-die process variations. | Pei-Yu Huang, Jia-Hong Wu, Yu-Min Lee |
| 2009 | Diagnosing integrator leakage of single-bit first-order DeltaSigma modulator using DC input. | Xuan-Lun Huang, Chen-Yuan Yang, Jiun-Lang Huang |
| 2009 | Timing driven power gating in high-level synthesis. | Shih-Hsu Huang, Chun-Hua Cheng |
| 2009 | Thermal-aware post compilation for VLIW architectures. | Wen-Wen Hsieh, TingTing Hwang |
| 2009 | Simultaneous data transfer routing and scheduling for interconnect minimization in multicycle communication architecture. | Yu-Ju Hong, Ya-Shih Huang, Juinn-Dar Huang |
| 2009 | Thermal optimization in multi-granularity multi-core floorplanning. | Michael B. Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, Sung Kyu Lim |
| 2009 | Accelerating statistical static timing analysis using graphics processing units. | Kanupriya Gulati, Sunil P. Khatri |
| 2009 | Fast circuit simulation on graphics processing units. | Kanupriya Gulati, John F. Croix, Sunil P. Khatri, Rahm Shastry |
| 2009 | Improving scalability of model-checking for minimizing buffer requirements of synchronous dataflow graphs. | Nan Guan, Zonghua Gu, Wang Yi, Ge Yu |
| 2009 | Efficient analytical determination of the SEU-induced pulse shape. | Rajesh Garg, Sunil P. Khatri |
| 2009 | Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction. | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye |
| 2009 | Design and chip implementation of the ubiquitous processor HCgorilla. | Masa-Aki Fukase, Kazunori Noda, Atsuko Yokoyama, Tomoaki Sato |
| 2009 | A delay-optimized universal FPGA routing architecture. | Fang Wu, Huowen Zhang, Lei Duan, Jinmei Lai, Yuan Wang, Jiarong Tong |
| 2009 | Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration. | Masato Edahiro |
| 2009 | Using a dataflow abstracted virtual prototype for HdS-design. | Wolfgang Ecker, Stefan Heinen, Michael Velten |
| 2009 | System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs). | Xiangyu Dong, Yuan Xie |
| 2009 | Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems. | Rainer Dmer, Andreas Gerstlauer, Wolfgang Mller |
| 2009 | Self-adjusting constrained random stimulus generation using splitting evenness evaluation and XOR constraints. | Shujun Deng, Zhiqiu Kong, Jinian Bian, Yanni Zhao |
| 2009 | A framework for estimating NBTI degradation of microarchitectural components. | Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan |
| 2009 | An automated design approach for CMOS LDO regulators. | Samiran DasGupta, Pradip Mandal |
| 2009 | Efficient simulated evolution based rerouting and congestion-relaxed layer assignment on 3-D global routing. | Ke-Ren Dai, Wen-Hao Liu, Yih-Lang Li |
| 2009 | A multilevel analytical placement for 3D ICs. | Jason Cong, Guojie Luo |
| 2009 | On the futility of statistical power optimization. | Jason Cong, Puneet Gupta, John Lee |
| 2009 | Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications. | Minki Cho, Jason Schlessman, Wayne H. Wolf, Saibal Mukhopadhyay |