| 2009 | Timing variation-aware task scheduling and binding for MPSoC. | HaNeul Chon, Taewhan Kim |
| 2009 | Code decomposition and recomposition for enhancing embedded software performance. | Youngchul Cho, Kiyoung Choi |
| 2009 | On improved scheme for digital circuit rewiring and application on further improving FPGA technology mapping. | F. S. Chim, T. K. Lam, Y. L. Wu |
| 2009 | The road to 3D EDA tool readiness. | Charles C. Chiang, Subarna Sinha |
| 2009 | Memory subsystem simulation in software TLM/T models. | Eric Cheung, Harry Hsieh, Felice Balarin |
| 2009 | Fast and accurate performance simulation of embedded software for MPSoC. | Eric Cheung, Harry Hsieh, Felice Balarin |
| 2009 | Partial order method for timed simulation of system-level MPSoC designs. | Eric Cheung, Harry Hsieh, Felice Balarin |
| 2009 | Conflict driven scan chain configuration for high transition fault coverage and low test power. | Zhen Chen, Boxue Yin, Dong Xiang |
| 2009 | Tolerating process variations in high-level synthesis using transparent latches. | Yibo Chen, Yuan Xie |
| 2009 | High-performance global routing with fast overflow reduction. | Huang-Yu Chen, Chin-Hsiung Hsu, Yao-Wen Chang |
| 2009 | CriAS: a performance-driven criticality-aware synthesis flow for on-chip multicycle communication architecture. | Chia-I Chen, Juinn-Dar Huang |
| 2009 | An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. | Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang |
| 2009 | Accounting for non-linear dependence using function driven component analysis. | Lerong Cheng, Puneet Gupta, Lei He |
| 2009 | A dynamic quality-scalable H.264 video encoder chip. | Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Chen, Ching-Lung Su, Cheng-An Chien, Jiun-In Guo, Jinn-Shyan Wang |
| 2009 | Soft lists: a native index structure for NOR-flash-based embedded devices. | Li-Pin Chang, Chen-Hui Hsu |
| 2009 | A multi-task-oriented security processing architecture with powerful extensibility. | Dan Cao, Jun Han, Xiaoyang Zeng, Shi-ting Lu |
| 2009 | An application-centered design flow for self reconfigurable systems implementation. | Fabio Cancare, Marco D. Santambrogio, Donatella Sciuto |
| 2009 | Path selection for monitoring unexpected systematic timing effects. | Nicholas Callegari, Pouria Bastani, Li-C. Wang, Sreejit Chakravarty, Alexander Tetelbaum |
| 2009 | Automatic instrumentation of embedded software for high level hardware/software co-simulation. | Aimen Bouchhima, Patrice Gerin, Frdric Ptrot |
| 2009 | Gen-Adler: the Generalized Adler's equation for injection locking analysis in oscillators. | Prateek Bhansali, Jaijeet S. Roychowdhury |
| 2009 | Array like runtime reconfigurable MIMO detectors for 802.11n WLAN: a design case study. | Pankaj Bhagawat, Rajballav Dash, Gwan S. Choi |
| 2009 | System-level exploration tool for energy-aware memory management in the design of multidimensional signal processing systems. | Florin Balasa, Ilie I. Luican, Hongwei Zhu, Doru V. Nasui |
| 2009 | Fault modeling and testing of retention flip-flops in low power designs. | Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, Kun-Cheng Wu |
| 2009 | A design methodology and device/circuit/architecture compatible simulation framework for low-power magnetic quantum cellular automata systems. | Charles Augustine, Behtash Behin-Aein, Xuanyao Fong, Kaushik Roy |
| 2009 | Hardware-dependent software synthesis for many-core embedded systems. | Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski |