| 2005 | Vector extraction for average total power estimation. | Yongjun Xu, Jinghua Chen, Zuying Luo, Xiaowei Li |
| 2005 | Hardware/software co-design using hierarchical platform-based design method. | Zhihui Xiong, Sikun Li, Jihua Chen |
| 2005 | Probabilistic congestion model considering shielding for crosstalk reduction. | Jinjun Xiong, Lei He |
| 2005 | Hardware/software partitioning for platform-based design method. | Zhihui Xiong, Jihua Chen, Sikun Li |
| 2005 | Modeling SystemC design in UML and automatic code generation. | Xi Chen, Jianhua Lu, Zucheng Zhou, YaoHui Shang |
| 2005 | Partitioned bus coding for energy reduction. | Lin Xie, Peiliang Qiu, Qinru Qiu |
| 2005 | Instruction scheduling of VLIW architectures for balanced power consumption. | Shu Xiao, Edmund Ming-Kit Lai |
| 2005 | Adaptive fuzzy control scheduling of window-constrained real-time systems. | Zhu Xiangbin, Shi-liang Tu |
| 2005 | A novel transmitter for 1000Base-T physical transceiver. | |
| 2005 | BDD-based two variable sharing extraction. | Dennis Wu, Jianwen Zhu |
| 2005 | SoC test scheduling using the B-tree based floorplanning technique. | Jen-Yi Wuu, Tung-Chieh Chen, Yao-Wen Chang |
| 2005 | Maze routing with OPC consideration. | Yun-Ru Wu, Ming-Chao Tsai, Ting-Chi Wang |
| 2005 | Timing driven track routing considering coupling capacitance. | Di Wu, Jiang Hu, Min Zhao, Rabi N. Mahapatra |
| 2005 | System-level architectural exploration using allocation-on-demand technique. | Qiang Wu, Jinian Bian, Hongxi Xue |
| 2005 | Effective analytical delay model for transistor sizing. | Zhaojun Wo, Israel Koren |
| 2005 | Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands. | Tongquan Wei, Kaijie Wu, Ramesh Karri, Alex Orailoglu |
| 2005 | Design of A 2.4-GHz integrated frequency synthesizer. | Fei Wang, Jianyu Zhang, Xuan Wang, Jinmei Lai, Chengshou Sun |
| 2005 | Interconnect estimation without packing via ACG floorplans. | Jia Wang, Hai Zhou |
| 2005 | A retention-aware test power model for embedded SRAM. | Baosheng Wang, Josh Yang, Yuejian Wu, Andr Ivanov |
| 2005 | Substrate resistance extraction with direct boundary element method. | Xiren Wang, Wenjian Yu, Zeyi Wang |
| 2005 | TERPS: the embedded reliable processing system. | Hongxia Wang, Samuel Rodrguez, Cagdas Dirik, Amol Gole, Vincent Chan, Bruce L. Jacob |
| 2005 | An LP-based methodology for improved timing-driven placement. | Qingzhou (Ben) Wang, John Lillis, Shubhankar Sanyal |
| 2005 | Automatic assume guarantee analysis for assertion-based formal verification. | Dong Wang, Jeremy R. Levitt |
| 2005 | The polygonal contraction heuristic for rectilinear Steiner tree construction. | Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xiaodong Hu, Guiying Yan |
| 2005 | An improved P-admissible floorplan representation based on Corner Block List. | Renshen Wang, Sheqin Dong, Xianlong Hong |