| 2004 | A cosynthesis algorithm for application specific processors with heterogeneous datapaths. | Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki |
| 2004 | A small-area high-performance 512-point 2-dimensional FFT single-chip processor. | Naoto Miyamoto, Leo Karnan, Kazuyuki Maruo, Koji Kotani, Tadahiro Ohmi |
| 2004 | Practical methodology of post-layout gate sizing for 15% more power saving. | Noriyuki Miura, Naoki Kato, Tadahiro Kuroda |
| 2004 | MOSFET modeling for RF-CMOS design. | Mitiko Miura-Mattausch |
| 2004 | Layer assignment for reliable system-on-package. | Jacob R. Minz, Sung Kyu Lim |
| 2004 | A large-current-output boosted voltage generator with non-overlapping clock control for sub-1-V memory applications. | Kyeong-Sik Min, Young-Hee Kim, Daejeong Kim, Dong Myeong Kim, Jin-Hong Ahn |
| 2004 | New opportunities with the open architecture test system. | Adi Merschon |
| 2004 | Rate analysis for streaming applications with on-chip buffer constraints. | Alexander Maxiaguine, Simon Knzli, Samarjit Chakraborty, Lothar Thiele |
| 2004 | Fast, predictable and low energy memory references through architecture-aware compilation. | Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig |
| 2004 | Disjoint-support Boolean decomposition combining functional and structural methods. | Andrs Martinelli, Ren Krenz, Elena Dubrova |
| 2004 | High-level modeling of continuous-time Delta-Sigma A/D-converters using formal models. | Ewout Martens, Georges G. E. Gielen |
| 2004 | Analysis of MOS cross-coupled | Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra |
| 2004 | Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process. | Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui |
| 2004 | Buffer allocation algorithm with consideration of routing congestion. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2004 | Longest path selection for delay test under process variation. | Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi |
| 2004 | Frequency-dependent reluctance extraction. | Clement Luk, Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2004 | A high performance bus communication architecture through bus splitting. | Ruibing Lu, Cheng-Kok Koh |
| 2004 | Compiler based exploration of DSP energy savings by SIMD operations. | Markus Lorenz, Peter Marwedel, Thorsten Drger, Gerhard P. Fettweis, Rainer Leupers |
| 2004 | Satisfiability and integer programming as complementary tools. | Ruiming Li, Dian Zhou, Donglei Du |
| 2004 | CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects. | Zhao Li, Ravikanth Suravarapu, Roy Hartono, Sambuddha Bhattacharya, Kartikeya Mayaram, Chuanjin Richard Shi |
| 2004 | On compliance test of on-chip bus for SOC. | Hue-Min Lin, Chia-Chih Yen, Che-Hua Shih, Jing-Yang Jou |
| 2004 | Robust fixed-outline floorplanning through evolutionary search. | Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang |
| 2004 | A high efficiency 0.5W BTL class-D audio amplifier with RWDM technique. | Simon Cimin Li, Vincent Chia-Chang Lin |
| 2004 | A high efficiency 0.5W BTL class-D audio amplifier with RWDM technique. | Simon Cimin Li, Vincent Chia-Chang Lin |
| 2004 | High-level area and power-up current estimation considering rich cell library. | Fei Li, Lei He, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy |