| 2004 | Parallel verilog simulation: architecture and circuit partition. | Tun Li, Yang Guo, Sikun Li, Fujiang Ao, Gongjie Li |
| 2004 | Minimizing energy consumption of hard real-time systems with simultaneous tasks scheduling and voltage assignment using statistical data. | Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki |
| 2004 | Minimizing energy consumption of multiple-processors-core systems with simultaneous task allocation, scheduling and voltage assignment. | Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki |
| 2004 | A closed caption TV microcontroller. | Ekachai Leelarasmee, Kanitpong Pengwon |
| 2004 | A bandwidth and memory efficient MPEG-4 shape encoder. | Kun-Bin Lee, Nelson Yen-Chung Chang, Hao-Yun Chin, Hui-Cheng Hsu, Chein-Wei Jen |
| 2004 | System level design technology for realizing an ambient intelligent environment. | Rudy Lauwereins |
| 2004 | Bandwidth tracing arbitration algorithm for mixed-clock SoC with dynamic priority adaptation. | Young-Su Kwon, Jae-Gon Lee, Chong-Min Kyung |
| 2004 | DEPOGIT: dense power-ground interconnect architecture for physical design integrity. | Atsushi Kurokawa, Nobuto Ono, Tetsuro Kage, Hiroo Masuda |
| 2004 | A sub-mW MPEG-4 motion estimation processor core for mobile video application. | Yuki Kuroda, Junichi Miyakoshi, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto |
| 2004 | Synthesizable HDL generation method for configurable VLIW processors. | Yuki Kobayashi, Shinsuke Kobayashi, Koji Okuda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai |
| 2004 | SmartGlue: an interface controller with auto reconfiguration for field programmable computing machine. | Young-Il Kim, Bong-Il Park, Jae-Gon Lee, Chong-Min Kyung |
| 2004 | Design methodology for IRA codes. | Frank Kienle, Norbert Wehn |
| 2004 | Future reconfigurable computing system. | Masahiko Kawamura, Hideharu Amano |
| 2004 | A dynamic element matching circuit for multi-bit delta-sigma modulators. | Ryozo Katoh, Shin-ya Kobayashi, Takao Waho |
| 2004 | Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. | Chi-Chou Kao, Yen-Tai Lai |
| 2004 | Technology mapping and packing for coarse-grained, anti-fuse based FPGAs. | Chang Woo Kang, Ali Iranli, Massoud Pedram |
| 2004 | Combinatorial group testing methods for the BIST diagnosis problem. | Andrew B. Kahng, Sherief Reda |
| 2004 | An image-sensor-based optical receiver fabricated in a standard 0.35-m CMOS technology for free-space optical communications. | Keiichiro Kagawa, Tomoaki Kawakami, Hiroaki Asazu, Takashi Ikeuchi, Akiko Fujiuchi, Jun Ohta, Masahiro Nunoshita |
| 2004 | SPICE compatible circuit models for partial reluctance K. | Hao Ji, Qingjian Yu, Wayne Wei-Ming Dai |
| 2004 | A mixed-mode extraction flow for high performance microprocessors. | Tao Jiang, Eric Pettus, Daksh Lehther |
| 2004 | EuroSoC: towards a joint university/industry research infrastructure for system on chip and system in package. | Ahmed Amine Jerraya |
| 2004 | Adaptive supply voltage technique for low swing interconnects. | Woopyo Jeong, Bipul Chandra Paul, Kaushik Roy |
| 2004 | Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting. | Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, Chuanjin Richard Shi |
| 2004 | High speed layout synthesis for minimum-width CMOS logic cells via Boolean satisfiability. | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
| 2004 | Design of POP-11 (PDP-11 on programmable chip). | Yoshihiro Iida, Naohiko Shimizu |