| 1998 | Metacore: A Configurable and Instruction Level Extensible DSP Core. | Jin-Hyuk Yang, Byung-Woon Kim, Sung-Won Seo, Sang-Jun Nam, Chang-Ho Ryu, Jang-Ho Cho, Chong-Min Kyung |
| 1998 | Space- and Time-Efficient BDD Construction via Working Set Control. | Bwolen Yang, Yirng-An Chen, Randal E. Bryant, David R. O'Hallaron |
| 1998 | New Methods to Find Optimal Non-Disjoint Bi-Decompositions. | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya |
| 1998 | Design and Experimental Results of a 2V-Operation Single-Chip GaAs T/R-MMIC Front-End for 1.9-GHz Personal Communications. | Kazuya Yamamoto, Takao Moriwaki, Yutaka Yoshii, Takayuki Fujii, Jun Otsuji, Yoshinobu Sasaki, Yukio Miyazaki, Kazuo Nishitani |
| 1998 | Binding and Scheduling Algorithms for Highly Retargetable Compilation. | Masayuki Yamaguchi, Nagisa Ishiura, Takashi Kambe |
| 1998 | Inverse Modeling - A Promising Approach to Know What Is Made and What Should Be Made. | Seiichiro Yamaguchi, Hiroshi Goto |
| 1998 | A Novel Design Assistant for Analog Circuits. | Markus Wolf, Ulrich Kleine, Frdric Schafer |
| 1998 | VLSI for Multimedia U-NII WLANs. | Neil Weste, David J. Skellern, Terry Percival |
| 1998 | Reliable Threshold Voltage Determination for Sub-0.1µm Gate Length MOSFET's. | Morikazu Tsuno, Masato Suga, Masayasu Tanaka, Kentaro Shibahara, Mitiko Miura-Mattausch, Masataka Hirose |
| 1998 | Module Selection Using Manufacturing Information. | Hiroyuki Tomiyama, Hiroto Yasuura |
| 1998 | An Incremental Placement and Global Routing Algorithm for Field-Programmable Gate Arrays. | Nozomu Togawa, Kayoko Hagi, Masao Yanagisawa, Tatsuo Ohtsuki |
| 1998 | A High-Level Synthesis System for Digital Signal Processing Based on Enumerating Data-Flow Graphs. | Nozomu Togawa, Takafumi Hisaki, Masao Yanagisawa, Tatsuo Ohtsuki |
| 1998 | Development of a Support Tool for PCB Design with EMC Constraint. | Yuji Tarui, Takehiro Takahashi, Noboru Schibuya |
| 1998 | A Redundant Fault Identification Algorithm with Exclusive-OR Circuit Reduction. | Miyako Tandai, Takao Shinsha |
| 1998 | A Survey for Pass-Transistor Logic Technologies - Recent Researches and Developments and Future Prospects (Embedded Tutorial). | Kazuo Taki |
| 1998 | Partial Scan Design Methods Based on Internally Balanced Structure. | Tomoya Takasaki, Tomoo Inoue, Hideo Fujiwara |
| 1998 | Automated Design of Wave Pipelined Multiport Register Files. | Kouji Takano, Takehito Sasaki, Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura |
| 1998 | TITAC-2: An Asynchronous 32-bit Microprocessor. | Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya |
| 1998 | A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs. | Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi |
| 1998 | Effective Simulation for the Giga-scale Massively Parallel Supercomputer SR2201. | Kaoru Suzuki, Shunsuke Miyamoto, Masato Kurosaki, Junji Nakagoshi |
| 1998 | A Hardware Software Cosimulation Backplane with Automatic Interface Generation. | Wonyong Sung, Soonhoi Ha |
| 1998 | The Ensparsed LU Decomposition Method for Large Scale Circuit Transient Analysis. | Reiji Suda, Yoshio Oyanagi |
| 1998 | Decision Diagrams for Discrete Functions: Classification and Unified Interpretation. | Radomir S. Stankovic, Tsutomu Sasao |
| 1998 | Integer Programming Models for Optimization Problems in Test Generation. | Joo P. Marques Silva |
| 1998 | Automatic Test Generation for Linear Analog Circuits under Parameter Variations. | Chuanjin Richard Shi, Michael W. Tian |