Skip to content

Asia and South Pacific Design Automation Conference

ASPDAC

B

CORE rank

CORE rank (raw)

B

Fields of research

Distributed Computing and Systems Software

Papers indexed

4,548

1995–2026

Papers per year

1995301 peak2026

ASPDAC papers

4,548 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1998Mixed-Signal Hardware Description Languages in the Era of System-on-Silicon: Challenges and Opportunities (Abstract of Embedded Tutorial).C.-J. Richard Shi
1998Real Time Fault Injection Using Logic Emulators.Reza Sedaghat-Maman, Erich Barke
1998Tool Capabilities Needed for Designing 100 MHz Interconnects.Tim A. Schreyer
1998ALPS: An Automatic Layouter for Pass-Transistor Cell Synthesis.Yasuhiko Sasaki, Kunihito Rikino, Kazuo Yano
1998High-speed GaAs MESFET Digital IC Design for Optical Communication Systems.Kimikazu Sano, Koichi Narahara, Koichi Murata, Taiichi Otsuji, Kiyomitsu Onodera
1998On the CSC Property of Signal Transition Graph Specifications for Asynchronous Circuit Design.Mohit Sahni, Takashi Nanya
1998A New Design for Double Edge Triggered Flip-flops.Massoud Pedram, Qing Wu, Xunwei Wu
1998Logical-Physical Co-design for Deep Submicron Circuits: Challenges and Solutions (Embedded Tutorial).Massoud Pedram
1998Power Reduction in Pipelines.Sri Parameswaran, Hui Guo
1998HW-SW Co-Synthesis: The Present and The Future (Embedded Tutorial).Sri Parameswaran
1998On the Optimal Sub-routing Structures of 2-D FPGA Greedy Routing Architectures.Jiaofeng Pan, Yu-Liang Wu, C. K. Wong
1998Reduced Order Macromodel of Coupled Interconnects for Timing and Functional Verification of Sub Half-micron IC Designs.Davide Pandini, Primo Scandolara, Carlo Guardiani
1998Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing.Takao Onoye, Gen Fujita, Hiroyuki Okuhata, Morgan Hirosuke Miki, Isao Shirakawa
1998Power Reduction in Microprocessor Chips by Gated Clock Routing.Jaewon Oh, Massoud Pedram
1998Module Placement on BSG-Structure with Pre-Placed Modules and Rectilinear Modules.Shigetoshi Nakatake, Masahiro Furuya, Yoji Kajitani
1998An Architecture-oriented Routing Method for FPGAs Having Rich Hierarchical Routing Resources.Takahiro Murooka, Atsushi Takahara, Toshiaki Miyazaki, Akihiro Tsutsui
1998Reconfigurable Systems: A Survey (Embedded Tutorial).Toshiaki Miyazaki
1998The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip.Takashi Midorikawa, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano
1998An Analysis on VLSI Interconnection Considering Skin Effect.Tetsuhisa Mido, Kunihiro Asada
1998Function Decomposition and Synthesis Using Linear Sifting.Christoph Meinel, Fabio Somenzi, Thorsten Theobald
1998Low Power Realization of FIR Filters Implemented using Distributed Arithmetic.Mahesh Mehendale, Amit Sinha, Sunil D. Sherlekar
1998TCAD/DA for MPU and ASIC Development.Hiroo Masuda, Katsumi Tsuneno, Hisako Sato, Kazutaka Mori
1998An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits.Jinan Lou, Amir H. Salek, Massoud Pedram
1998A Simple Architecture of Low Voltage GHz BiCMOS Four-Quadrant Analogue Multiplier using Complementary Voltage Follower.Simon Cimin Li, Reggie Chien, Jerry Chien, Kaung-Long Lin
1998Optimized Array Index Computation in DSP Programs.Rainer Leupers, Anupam Basu, Peter Marwedel
4,3014,325 of 4,548← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.