| 1998 | Quantitative Selection of Media Benchmarks. | Chunho Lee, Miodrag Potkonjak |
| 1998 | ETDD-Based Synthesis of Term-Based FPGAs for Incompletely Specified Boolean Functions. | Gueesang Lee, Rolf Drechsler |
| 1998 | Low Power Micoprocessors for Comparative Study on Bus Architecture and Multiplexer Architecture. | Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada |
| 1998 | A Timing-Driven Global Routing Algorithm with Pin Assignment, Block Reshaping, and Positioning for Building Block Layout. | Tetsushi Koide, Shin'ichi Wakabayashi |
| 1998 | Scan-chain Optimization Algorithms for Multiple Scan-paths. | Susumu Kobayashi, Masato Edahiro, Mikio Kubo |
| 1998 | A Clock-Gating Method for Low-Power LSI Design. | Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi |
| 1998 | Synthesis of Power Efficient Systems-on-Silicon. | Darko Kirovski, Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith |
| 1998 | A Circuit Design of 16x16 Multiplier Using Redundant Binary Arithmetic. | Tae-Min Kim, Gun Sun Shin |
| 1998 | Hierarchical LVS Based on Hierarchy Rebuilding. | Wonjong Kim, Hyunchul Shin |
| 1998 | Practical Synthesis of Speed-Independent Circuits Using Unfoldings. | Uisok Kim, Dong-Ik Lee |
| 1998 | Dual-loop Digital PLL Design for Adaptive Clock Recovery. | Tae Hun Kim, Beomsup Kim |
| 1998 | A CMOS Smart Image Sensor LSI for Focal-Plane Compression. | Shoji Kawahito, Makoto Yoshida, Masaaki Sasaki, Daisuke Miyazaki, Yoshiaki Tadokoro, Kenji Murata, Shiro Doushou, Akira Matsuzawa |
| 1998 | CMOS Image Sensors with Video Compression. | Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa |
| 1998 | Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines. | Hiroshi Kawaguchi, Takayasu Sakurai |
| 1998 | A Hybrid Power Model for RTL Power Estimation. | Yi-Min Jiang, Shi-Yu Huang, Kwang-Ting Cheng, Deborah C. Wang, ChingYen Ho |
| 1998 | Loop Pipelining in Hardware-Software Partitioning. | Jinhwan Jeon, Kiyoung Choi |
| 1998 | A Design of Sound Synthesis IC. | Ho Keun Jang |
| 1998 | Air-Pressure-Model-Based Fast Algorithms for General Floorplan. | Tomonori Izumi, Atsushi Takahashi, Yoji Kajitani |
| 1998 | FPGA for High-Performance Bit-Serial Pipeline Datapath. | Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda |
| 1998 | Power-Pro: Programmable Power Management Architecture. | Tohru Ishihara, Hiroto Yasuura |
| 1998 | Heterogeneous BISR-approach using System Level Synthesis Flexibility. | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
| 1998 | Techniques for Functional Test Pattern Execution. | Inki Hong, Miodrag Potkonjak |
| 1998 | A New Multiport Memory for High Performance Parallel Processor System with Shared Memory. | Keiichi Hirano, Taizou Ono, Hiroyuki Kurino, Mitsumasa Koyanagi |
| 1998 | High-Level Estimation Techniques for Usage in Hardware/Software Co-Design. | Jrg Henkel, Rolf Ernst |
| 1998 | Simultaneous Wire Sizing and Wire Spacing in Post-Layout Performance Optimization. | Jiang-An He, Hideaki Kobayashi |