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Asia and South Pacific Design Automation Conference

ASPDAC

B

CORE rank

CORE rank (raw)

B

Fields of research

Distributed Computing and Systems Software

Papers indexed

4,548

1995–2026

Papers per year

1995301 peak2026

ASPDAC papers

4,548 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2012Formal methods for coverage analysis of architectural power states in power-managed designs.Aritra Hazra, Pallab Dasgupta, Ansuman Banerjee, Kevin Harer
2012Clock-constrained simultaneous allocation and binding for multiplexer optimization in high-level synthesis.Yuko Hara, Hiroyuki Tomiyama
2012BTI-aware design using variable latency units.Saket Gupta, Sachin S. Sapatnekar
2012GNOMO: Greater-than-NOMinal Vdd operation for BTI mitigation.Saket Gupta, Sachin S. Sapatnekar
2012GreenDroid: An architecture for the Dark Silicon Age.Nathan Goulding-Hotta, Jack Sampson, Qiaoshi Zheng, Vikram Bhatt, Joe Auricchio, Steven Swanson, Michael Bedford Taylor
2012Abstract system-level models for early performance and power exploration.Andreas Gerstlauer, Suhas Chakravarty, Manan Kathuria, Parisa Razaghi
2012On error modeling of electrical bugs for post-silicon timing validation.Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing-Jia Liou
2012Post-silicon patching for verification/debugging with high-level models and programmable logic.Masahiro Fujita, Hiroaki Yoshida
2012Security Enhanced Linux on embedded systems: A hardware-accelerated implementation.Leandro Fiorin, Alberto Ferrante, Konstantinos Padarnitsas, Francesco Regazzoni
2012The impact of hot carriers on timing in large circuits.Jianxin Fang, Sachin S. Sapatnekar
2012Character design and stamp algorithms for Character Projection Electron-Beam Lithography.Peng Du, Wenbo Zhao, Shih-Hung Weng, Chung-Kuan Cheng, Ronald L. Graham
2012Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design.Yuelin Du, Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao
2012Parallel discrete event simulation of Transaction Level Models.Rainer Dmer, Weiwei Chen, Xu Han
2012GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing.Duo Ding, Bei Yu, David Z. Pan
2012EPIC: Efficient prediction of IC manufacturing hotspots with a unified meta-classification formulation.Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan
2012A PVT-robust feedback class-C VCO using an oscillation swing enhancement technique.Wei Deng, Kenichi Okada, Akira Matsuzawa
2012Compilation and architecture support for customized vector instruction extension.Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Hui Huang, Bin Liu, Raghu Prabhakar, Glenn Reinman, Marco Vitanza
2012Power optimization of wireless video sensor nodes in M2M networks.Shao-Yi Chien, Teng-Yuan Cheng, Chieh-Chuan Chiu, Pei-Kuei Tsung, Chia-han Lee, V. Srinivasa Somayazulu, Yen-Kuang Chen
2012Probabilistic design in spintronic memory and logic circuit.Yiran Chen, Yaojun Zhang, Peiyuan Wang
2012A Look Up Table design with 3D bipolar RRAMs.Yi-Chung Chen, Wei Zhang, Hai Li
2012Fine-grained dynamic voltage scaling on OLED display.Xiang Chen, Jian Zheng, Yiran Chen, Wei Zhang, Hai Li
2012Buffer minimization in pipelined SDF scheduling on multi-core platforms.Yuankai Chen, Hai Zhou
2012An adaptive LU factorization algorithm for parallel circuit simulation.Xiaoming Chen, Yu Wang, Huazhong Yang
2012Nano-Electro-Mechanical (NEM) relays and their application to FPGA routing.Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2012A 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester.Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
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