| 2017 | Hardware Trojan detection based on correlated path delays in defiance of variations with spatial correlations. | Fatma Nur Esirci, Alp Arslan Bayrakci |
| 2017 | Embracing approximate computing for energy-efficient motion estimation in high efficiency video coding. | Walaa El-Harouni, Semeen Rehman, Bharath Srinivas Prabakaran, Akash Kumar, Rehan Hafiz, Muhammad Shafique |
| 2017 | MARS: A flexible real-time streaming platform for testing automation systems. | Raphael Eidenbenz, Alexandra Moga, Thanikesavan Sivanthi, Carsten Franke |
| 2017 | Architecting high-speed command schedulers for open-row real-time SDRAM controllers. | Leonardo Ecco, Rolf Ernst |
| 2017 | Performance evaluation and design trade-offs for wireless-enabled SMART NoC. | Karthi Duraisamy, Partha Pratim Pande |
| 2017 | Performance impacts and limitations of hardware memory access trace collection. | Nicholas C. Doyle, Eric Matthews, Graham M. Holland, Alexandra Fedorova, Lesley Shannon |
| 2017 | MobiXen: Porting Xen on Android devices for mobile virtualization. | Yaozu Dong, Jianguo Yao, Haibing Guan, R. Ananth Krishna, Yunhong Jiang |
| 2017 | Machine learning enabled power-aware Network-on-Chip design. | Dominic DiTomaso, Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri |
| 2017 | BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking. | Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee |
| 2017 | WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach. | Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clment David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard K. Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon D. ter Braak, Nikolaos S. Voros, Jrgen Becker |
| 2017 | Robust TSV-based 3D NoC design to counteract electromigration and crosstalk noise. | Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty |
| 2017 | Analyzing security breaches of countermeasures throughout the refinement process in hardware design flow. | Jean-Luc Danger, Sylvain Guilley, Philippe Nguyen, Robert Nguyen, Youssef Souissi |
| 2017 | Dynamic software randomisation: Lessons learnec from an aerospace case study. | Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster, Francisco J. Cazorla |
| 2017 | An extension of Cohn's sensitivity theorem to mismatch analysis of 1-port resistor networks. | Sebastien Cliquennois |
| 2017 | Improving the accuracy of the leakage power estimation of embedded CPUs. | Ting-Wu Chin, Shiao-Li Tsao, Kuo-Wei Hung, Pei-Shu Huang |
| 2017 | Fix the leak! an information leakage aware secured cyber-physical manufacturing system. | Sujit Rokka Chhetri, Sina Faezi, Mohammad Abdullah Al Faruque |
| 2017 | On refining standard cell placement for self-aligned double patterning. | Ye-Hong Chen, Sheng-He Wang, Ting-Chi Wang |
| 2017 | Scheduling and optimization of genetic logic circuits on flow-based microfluidic biochips. | Yu-Jhih Chen, Sumit Sharma, Sudip Roy, Tsung-Yi Ho |
| 2017 | Real-time anomaly detection for streaming data using burst code on a neurosynaptic processor. | Qiuwen Chen, Qinru Qiu |
| 2017 | A circuit-equivalent battery model accounting for the dependency on load frequency. | Yukai Chen, Enrico Macii, Massimo Poncino |
| 2017 | Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar. | Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, Li Jiang |
| 2017 | MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems. | Di Chen, Hai Jin, Xiaofei Liao, Haikun Liu, Rentong Guo, Dong Liu |
| 2017 | Understanding the design of IBM neurosynaptic system and its tradeoffs: A user perspective. | Hsin-Pai Cheng, Wei Wen, Chunpeng Wu, Sicheng Li, Hai Helen Li, Yiran Chen |
| 2017 | High-density MOM capacitor array with novel mortise-tenon structure for low-power SAR ADC. | Nai-Chen Chen, Pang-Yen Chou, Helmut E. Graeb, Mark Po-Hung Lin |
| 2017 | Architectural evaluations on TSV redundancy for reliability enhancement. | Yen-Hao Chen, Chien-Pang Chiu, Russell Barnes, TingTing Hwang |