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Giovanni De Micheli

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

270

Venues

26

Active years

1983–2025

Best venue rank

A*

Where they publish

Papers

270 indexed papers, newest first.

YearVenueTitleAuthors
2025ASPDACArea-Oriented Optimization After Standard-Cell Mapping.Andrea Costamagna, Alessandro Tempia Calvino, Alan Mishchenko, Giovanni De Micheli
2025ASPDACBack-end-aware Fault-tolerant Quantum Oracle Synthesis.Mingfei Yu, Alessandro Tempia Calvino, Mathias Soeken, Giovanni De Micheli
2025DATEGradient Approximation of Approximate Multipliers for High-Accuracy Deep Neural Network Retraining.Chang Meng, Wayne P. Burleson, Weikang Qian, Giovanni De Micheli
2025DDECSLazy Man's Resynthesis For Glitching-Aware Power Minimization.Andrea Costamagna, Xiaoqing Xu, Giovanni De Micheli, Dino Ruic
2025ICCADMaking the Best Switch: Encoding Strategy Management for Efficient TFHE Circuit Evaluation.Mingfei Yu, Gabrielle De Micheli, Giovanni De Micheli
2025QCEA New Perspective of Constructing Resource-Efficient Data-Lookup Quantum Oracles.Mingfei Yu, Mathias Soeken, Giovanni De Micheli
2025VLSIDSymmetry-Based Synthesis for Interpretable Boolean Evaluation.Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli
2024ASPDACTowards Multiphase Clocking in Single-Flux Quantum Systems.Rassul Bairamkulov, Giovanni De Micheli
2024ASPDACAlgebraic and Boolean Methods for SFQ Superconducting Circuits.Alessandro Tempia Calvino, Giovanni De Micheli
2024ASPDACIn Medio Stat Virtus*: Combining Boolean and Pattern Matching.Gianluca Radi, Alessandro Tempia Calvino, Giovanni De Micheli
2024DACUnleashing the Power of T1-cells in SFQ Arithmetic Circuits.Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli
2024DACLate Breaking Results: Majority-Inverter Graph Minimization by Design Space Exploration.Siang-Yun Lee, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli
2024DATETechnology-Aware Logic Synthesis for Superconducting Electronics.Rassul Bairamkulov, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Mingfei Yu, Giovanni De Micheli
2024DATEUnleashing the Power of T1-Cells in SFQ Arithmetic Circuits.Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli
2024DATEScalable Logic Rewriting Using Don't Cares.Alessandro Tempia Calvino, Giovanni De Micheli
2024DATEScalable Sequential Optimization Under Observability Don't Cares.Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amar
2024DATEVACSEM: Verifying Average Errors in Approximate Circuits Using Simulation-Enhanced Model Counting.Chang Meng, Hanyu Wang, Yuqi Mai, Weikang Qian, Giovanni De Micheli
2024DATEQuantum State Preparation Using an Exact CNOT Synthesis Formulation.Hanyu Wang, Jason Cong, Giovanni De Micheli
2024ICCADRareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats.Chang Meng, Mingfei Yu, Hanyu Wang, Wayne P. Burleson, Giovanni De Micheli
2024ISCASAn Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization.Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli
2023ASPDACDepth-Optimal Buffer and Splitter Insertion and Optimization in AQFP Circuits.Alessandro Tempia Calvino, Giovanni De Micheli
2023DACImproving Standard-Cell Design Flow using Factored Form Optimization.Alessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu
2023DATEFanout-Bounded Logic Synthesis for Emerging Technologies - A Top-Down Approach.Dewmini Sudara Marakkalage, Giovanni De Micheli
2023ICCADTechnology Mapping Using Multi-Output Library Cells.Alessandro Tempia Calvino, Giovanni De Micheli
2023ICCADStriving for Both Quality and Speed: Logic Synthesis for Practical Garbled Circuits.Mingfei Yu, Giovanni De Micheli
2022ASPDACA Versatile Mapping Approach for Technology Mapping and Graph Optimization.Alessandro Tempia Calvino, Heinz Riener, Shubham Rai, Akash Kumar, Giovanni De Micheli
2022ASPDACEfficient Preparation of Cyclic Quantum States.Fereshte Mozafari, Yuxiang Yang, Giovanni De Micheli
2022ASPDACBoolean Rewriting Strikes Back: Reconvergence-Driven Windowing Meets Resynthesis.Heinz Riener, Siang-Yun Lee, Alan Mishchenko, Giovanni De Micheli
2022DACBeyond local optimality of buffer and splitter insertion for AQFP circuits.Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2022DATEMajority-based Design Flow for AQFP Superconducting Family.Giulia Meuli, Vinicius N. Possani, Rajinder Singh, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Patrick Vuillod, Luca G. Amar, Scott Chase, Jamil Kawa, Giovanni De Micheli
2022DATEtweedledum: A Compiler Companion for Quantum Computing.Bruno Schmitt, Giovanni De Micheli
2021ASPDACAlgebraic and Boolean Optimization Methods for AQFP Superconducting Circuits.Eleonora Testa, Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2021DACLUT-Based Optimization For ASIC Design Flow.Luca Gaetano Amar, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2021DATEPreserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies.Shubham Rai, Heinz Riener, Giovanni De Micheli, Akash Kumar
2021DATECompilation flow for classically defined quantum operations.Bruno Schmitt, Ali Javadi-Abhari, Giovanni De Micheli
2021DATEFrom Boolean functions to quantum circuits: A scalable quantum compilation flow in C++.Bruno Schmitt, Fereshte Mozafari, Giulia Meuli, Heinz Riener, Giovanni De Micheli
2021DDECSLogic Resynthesis of Majority-Based Circuits by Top-Down Decomposition.Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2020DACSAT-Sweeping Enhanced for Logic Synthesis.Luca G. Amar, Felipe S. Marranghello, Eleonora Testa, Christopher Casares, Vinicius N. Possani, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2020DATEMultiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper).Eleonora Testa, Samantha Lubaba Noor, Odysseas Zografos, Mathias Soeken, Francky Catthoor, Azad Naeemi, Giovanni De Micheli
2020DATEA Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks.Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amar, Giovanni De Micheli
2020ISCASEmulator Design and Generation of Synthetic Dataset in Multi-Ion Sensing.Ivan Ny Hanitra, Danilo Demarchi, Sandro Carrara, Giovanni De Micheli
2020ISCASEnumerating Optimal Quantum Circuits using Spectral Classification.Giulia Meuli, Mathias Soeken, Martin Roetteler, Giovanni De Micheli
2019ASPDACStructural rewriting in XOR-majority graphs.Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019DACScalable Generic Logic Synthesis: One Approach to Rule Them All.Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amar, Giovanni De Micheli, Mathias Soeken
2019DACReducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications.Eleonora Testa, Mathias Soeken, Luca G. Amar, Giovanni De Micheli
2019DATEReversible Pebbling Game for Quantum Memory Management.Giulia Meuli, Mathias Soeken, Martin Roetteler, Nikolaj S. Bjrner, Giovanni De Micheli
2019DATEOn-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis.Heinz Riener, Winston Haaswijk, Alan Mishchenko, Giovanni De Micheli, Mathias Soeken
2019DATECompiling Permutations for Superconducting QPUs.Mathias Soeken, Fereshte Mozafari, Bruno Schmitt, Giovanni De Micheli
2019DATEScalable Boolean Methods in a Modern Synthesis Flow.Eleonora Testa, Luca G. Amar, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2019ICCADThe Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits.Giulia Meuli, Mathias Soeken, Earl T. Campbell, Martin Roetteler, Giovanni De Micheli
2019ISCASExact Synthesis of Boolean Functions in Majority-of-Five Forms.Zhufei Chu, Winston Haaswijk, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019ISCASDirect and Catalyst-Free Growth of Vertically-Stacked Graphene-Based Structures for Enhanced Drug Sensing.Ioulia Tzouvadaki, Nima Aliakbarinodehi, Diana Dvila Pineda, Giovanni De Micheli, Sandro Carrara
2019RCEvaluating ESOP Optimization Methods in Quantum Compilation Flows.Giulia Meuli, Bruno Schmitt, Rdiger Ehlers, Heinz Riener, Giovanni De Micheli
2018ASPDACFunctional decomposition using majority.Zhufei Chu, Mathias Soeken, Yinshui Xia, Giovanni De Micheli
2018ASPDACA best-fit mapping algorithm to facilitate ESOP-decomposition in Clifford+T quantum network synthesis.Giulia Meuli, Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2018DACSAT based exact synthesis using DAG topology families.Winston Haaswijk, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli
2018DACDeveloping synthesis flows without human knowledge.Cunxi Yu, Houping Xiao, Giovanni De Micheli
2018DATEImprovements to boolean resynthesis.Luca Gaetano Amar, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2018DATETowards high-performance polarity-controllable FETs with 2D materials.Giovanni V. Resta, Jorge Romero Gonzalez, Yashwanth Balaji, Tarun Agarwal, Dennis Lin, Francky Catthoor, Iuliana P. Radu, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2018DATEPractical exact synthesis.Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amar, Robert K. Brayton, Giovanni De Micheli
2018ICCADMajority logic synthesis.Luca G. Amar, Eleonora Testa, Miguel Couceiro, Odysseas Zografos, Giovanni De Micheli, Mathias Soeken
2018ISCASDeep Learning for Logic Optimization Algorithms.Winston Haaswijk, Edo Collins, Benoit Seguin, Mathias Soeken, Frdric Kaplan, Sabine Ssstrunk, Giovanni De Micheli
2018ISCASPortable Memristive Biosensing System as Effective Point-of-Care Device for Cancer Diagnostics.Ioulia Tzouvadaki, Abuduwaili Tuoheti, Giovanni De Micheli, Danilo Demarchi, Sandro Carrara
2018RCSAT-based {CNOT, T} Quantum Circuit Synthesis.Giulia Meuli, Mathias Soeken, Giovanni De Micheli
2017ASPDACMulti-level logic benchmarks: An exactness study.Luca Gaetano Amar, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017ASPDACA novel basis for logic rewriting.Winston Haaswijk, Mathias Soeken, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017DACHierarchical Reversible Logic Synthesis Using LUTs.Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017DATE1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA.Federico Angiolini, Aya Ibrahim, William Andrew Simon, Ahmet Caner Yuzuguler, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2017DATEEndurance management for resistive Logic-In-Memory computing architectures.Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler
2017DATEBusy man's synthesis: Combinational delay optimization with SAT.Mathias Soeken, Giovanni De Micheli, Alan Mishchenko
2017DATEDesign automation and design space exploration for quantum computers.Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017DATEWave pipelining for majority-based beyond-CMOS technologies.Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amar, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
2017ICCADEnabling exact delay synthesis.Luca Gaetano Amar, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2017ISCASAn efficient electronic measurement interface for memristive biosensors.Sebastien Naus, Ioulia Tzouvadaki, Pierre-Emmanuel Gaillardon, Armando Biscontini, Giovanni De Micheli, Sandro Carrara
2017ISCASRM3 based logic synthesis (Special session paper).Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016ASPDACMajority-based synthesis for nanotechnologies.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016DACAn MIG-based compiler for programmable logic-in-memory architectures.Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Rolf Drechsler, Giovanni De Micheli
2016DATEExploiting inherent characteristics of reversible circuits for faster combinational equivalence checking.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli
2016DATEPanel: Looking backwards and forwards.Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Domenico Rossi, Joseph Sawicki
2016DATEThe Programmable Logic-in-Memory (PLiM) computer.Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli
2016DATEA power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache.Kyungsu Kang, Sangho Park, Jong-Bae Lee, Luca Benini, Giovanni De Micheli
2016DATEOptimizing Majority-Inverter Graphs with functional hashing.Mathias Soeken, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016FPGAA Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only).Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016FPLFast hierarchical NPN classification.Ana Petkovska, Mathias Soeken, Giovanni De Micheli, Paolo Ienne, Alan Mishchenko
2016FPLSingle-FPGA, scalable, low-power, and high-quality 3D ultrasound beamformer.William Andrew Simon, Ahmet Caner Yuzuguler, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2016FPLSingle-FPGA 3D ultrasound beamformer.Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2016ICCADFast generation of lexicographic satisfiable assignments: enabling canonicity in SAT-based applications.Ana Petkovska, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli, Robert K. Brayton, Paolo Ienne
2016ISCASAn integrated platform for differential electrochemical and ISFET sensing.Sara S. Ghoreishizadeh, Pantelis Georgiou, Sandro Carrara, Giovanni De Micheli
2016ISCASSimultaneous monitoring of anesthetics and therapeutic compounds with a portable multichannel potentiostat.Francesca Stradolini, Tamador Elboshra, Armando Biscontini, Giovanni De Micheli, Sandro Carrara
2016ISCASResistance impact by long connections on electrical behavior of integrated Memristive Biosensors.Ioulia Tzouvadaki, Alessandro Vallero, Francesca Puppo, Giovanni De Micheli, Sandro Carrara
2016RCEnumeration of Reversible Functions and Its Application to Circuit Complexity.Mathias Soeken, Nabila Abdessaied, Giovanni De Micheli
2016SATHeuristic NPN Classification for Large Functions Using AIGs and LEXSAT.Mathias Soeken, Alan Mishchenko, Ana Petkovska, Baruch Sterin, Paolo Ienne, Robert K. Brayton, Giovanni De Micheli
2015ASPDACMultiple Independent Gate FETs: How many gates do we need?Luca Gaetano Amar, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015DATEThe future of electronics, semiconductors, and design in Europe: panel.Marco Casale-Rossi, Giovanni De Micheli, Jalal Bagherli, Thierry Collette, Antun Domic, Horst Symanzik, Hossein Yassaie
2015DATEA ultra-low-power FPGA based on monolithically integrated RRAMs.Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2015DATETackling the bottleneck of delay tables in 3D ultrasound imaging.Aya Ibrahim, Pascal Hager, Andrea Bartolini, Federico Angiolini, Marcel Arditi, Luca Benini, Giovanni De Micheli
2015DATEFault modeling in controllable polarity silicon nanowire circuits.Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015FPGATowards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only).Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amar, Giovanni De Micheli
2015FPLAccurate power analysis for near-Vt RRAM-based FPGA.Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015ICCDFPGA-SPICE: A simulation-based power estimation framework for FPGAs.Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015IJCNNA neural approach to drugs monitoring for personalized medicine.Benjamin Staar, Marius Schirmer, Camilla Baj-Rossi, Giovanni De Micheli, Sandro Carrara, Elisabetta Chicca
2015ISCASFull system for translational studies of personalized medicine with free-moving mice.Sandro Carrara, Camilla Baj-Rossi, Sara Seyedeh Ghoreishizadeh, Stefano Riario, Grgoire Surrel, Francesca Stradolini, Cristina Boero, Giovanni De Micheli, Enver G. Kilinc, Catherine Dehollain
2014ASPDACData compression via logic synthesis.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli
2014BIBESafe Implementation of Embedded Software for a Portable Device Supporting Drug Administration.Alena Simalatsar, Romain Bornet, Wenqi You, Yann Thoma, Giovanni De Micheli
2014DACMajority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014DATEAn efficient manipulation package for Biconditional Binary Decision Diagrams.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014DATEPanel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads?Marco Casale-Rossi, Giovanni De Micheli, Rob Aitken, Antun Domic, Manfred Horstmann, Robert Hum, Philippe Magarshack
2014DATEAdvanced system on a chip design based on controllable-polarity FETs.Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Jian Zhang, Giovanni De Micheli
2014DSDMajority Logic Synthesis for Spin Wave Technology.Odysseas Zografos, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
2014FPGAA new basic logic structure for data-path computation (abstract only).Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Giovanni De Micheli
2014FPLPattern-based FPGA logic block and clustering algorithm.Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014ISCASQuantitative estimation of biological cell surface receptors by segmenting conventional fluorescence microscopy images.Julien Ghaye, Chiara Succa, Danilo Demarchi, Sinan K. Muldur, Pascal Colpo, Paolo Silacci, Guy Vergeres, Giovanni De Micheli, Sandro Carrara
2014ISCASMemristor-based devices for sensing.Francesca Puppo, Marie-Agnes Doucey, Massimiliano Di Ventra, Giovanni De Micheli, Sandro Carrara
2014ISCASTSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs.Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014ISCASNovel grid-based power routing scheme for regular controllable-polarity FET arrangements.Odysseas Zografos, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013ASPDACMIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013DACBDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013DACTowards structured ASICs using polarity-tunable Si nanowire transistors.Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amar, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2013DATEBiconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits.Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013DATEPanel: "will 3D-IC remain a technology of the future... even in the future?".Marco Casale-Rossi, Patrick Leduc, Giovanni De Micheli, Patrick Blouet, Brendan Farley, Anna Fontanelli, Dragomir Milojevic, Steve Smith
2013DATEVertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs.Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2013DATEElectronic implants: power delivery and management.Jacopo Olivo, Sara S. Ghoreishizadeh, Sandro Carrara, Giovanni De Micheli
2013ISCAS3.5-D integration: A case study.Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli
2013ISCASCharacterization of standard CMOS compatible photodiodes and pixels for Lab-on-Chip devices.Gozen Koklu, Ralph Etienne-Cummings, Yusuf Leblebici, Giovanni De Micheli, Sandro Carrara
2013ISCASSelf-checking ripple-carry adder with Ambipolar Silicon NanoWire FET.Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013ISCASDual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs.Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2012ASPDACEngineering complex systems for health, security and the environment.Giovanni De Micheli
2012BIBEMedical guidelines reconciling medical software and electronic devices: Imatinib case-study.Alena Simalatsar, Giovanni De Micheli
2012DACPhysical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors.Shashikanth Bobba, Michele De Marchi, Yusuf Leblebici, Giovanni De Micheli
2012DACIntegrated biosensors for personalized medicine.Giovanni De Micheli, Cristina Boero, Camilla Baj-Rossi, Irene Taurino, Sandro Carrara
2012DATEVoltage propagation method for 3-D power grid analysis.Cheng Zhang, Vasilis F. Pavlidis, Giovanni De Micheli
2012ETSEnhanced wafer matching heuristics for 3-D ICs.Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli
2012ISCASQuantitative comparison of commercial CCD and custom-designed CMOS camera for biological applications.Gozen Koklu, Julien Ghaye, Rene Beuchat, Giovanni De Micheli, Yusuf Leblebici, Sandro Carrara
2011ASPDACCELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits.Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli
2011DATELogic synthesis and physical design: Quo vadis?Giovanni De Micheli
2011DATEAn integrated platform for advanced diagnostics.Giovanni De Micheli, Sara S. Ghoreishizadeh, Cristina Boero, Francesco Valgimigli, Sandro Carrara
2011DATEAnalytical heat transfer model for thermal through-silicon vias.Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011ICCADAlternative design methodologies for the next generation logic switch.Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici
2011ISCASSkew variability in 3-D ICs with multiple clock domains.Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011ISCASThermal-aware system-level modeling and management for Multi-Processor Systems-on-Chip.Francesco Zanini, David Atienza, Luca Benini, Giovanni De Micheli
2010ASPDACDesign of networks on chips for 3D ICs.Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010BIBEMethods for Designing Reliable Probe Arrays.Michele Lombardi, Luca Benini, Abhishek Garg, Giovanni De Micheli
2010DACNetworks on Chips: from research to products.Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini
2010DACCarbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra
2010DATEPanel: First commandment at least, do nothing well!Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Piero Perlo, Andreas Wild, Roberto Zafalon
2010DATEPower consumption of logic circuits in ambipolar carbon nanotube technology.M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2010DATEA method to remove deadlocks in Networks-on-Chips with Wormhole flow control.Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010ISCASCharacterization of memristive Poly-Si Nanowires via empirical physical modelling.Nikolaos Archontas, Julius Georgiou, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli
2010ISCASDesign of a CNFET array for sensing and control in P450 based biochips for multiple drug detection.Shashikanth Bobba, Sandro Carrara, Giovanni De Micheli
2010ISCASMemristive devices fabricated with silicon nanowire schottky barrier transistors.Davide Sacchetto, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli, Yusuf Leblebici
2010ISCASDesign aspects of carry lookahead adders with vertically-stacked nanowire transistors.Davide Sacchetto, M. Haykel Ben Jamaa, Giovanni De Micheli, Yusuf Leblebici
2010ISCASTemperature sensor placement in thermal management systems for MPSoCs.Francesco Zanini, David Atienza, Colin N. Jones, Giovanni De Micheli
2010ISCASMulticore thermal management using approximate explicit model predictive control.Francesco Zanini, Colin N. Jones, David Atienza, Giovanni De Micheli
2009ASPDACA stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories.M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli
2009ASPDACSynthesis of networks on chips for 3D systems on chips.Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli
2009ASPDACA control theory approach for thermal balancing of MPSoC.Francesco Zanini, David Atienza, Giovanni De Micheli
2009CASESComplete nanowire crossbar framework optimized for the multi-spacer patterning technique.M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf Leblebici, Giovanni De Micheli
2009DACDecoding nanowire arrays fabricated with the multi-spacer patterning technique.M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli
2009DACNoC topology synthesis for supporting shutdown of voltage islands in SoCs.Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009DATEDesign of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis.Shashikanth Bobba, Jie Zhang, Antonio Pullini, David Atienza, Giovanni De Micheli
2009DATEPanel session - Consolidation, a modern "Moor of Venice" tale.Marco Casale-Rossi, Giovanni De Micheli
2009DATENovel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis.M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2009DATEPhysically clustered forward body biasing for variability compensation in nanometer CMOS design.Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Giovanni De Micheli, Enrico Macii
2009DATESunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips.Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009ICCADA method for calculating hard QoS guarantees for Networks-on-Chip.Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
2008ASPDACReliability-aware design for nanometer-scale devices.David Atienza, Giovanni De Micheli, Luca Benini, Jos L. Ayala, Pablo Garca Del Valle, Michael DeBole, Vijaykrishnan Narayanan
2008DACProgrammable logic circuits based on ambipolar CNFET.M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli
2008DATEDesigning Micro/Nano Systems for a Safer and Healthier Tomorrow.Giovanni De Micheli
2008DATEThermal Balancing Policy for Streaming Computing on Multiprocessor Architectures.Fabrizio Mulas, Michele Pittau, Marco Buttu, Salvatore Carta, Andrea Acquaviva, Luca Benini, David Atienza, Giovanni De Micheli
2008DATETemperature Control of High-Performance Multi-core Platforms Using Convex Optimization.Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Luca Benini, Giovanni De Micheli
2008DATEOS-Based Sensor Node Platform and Energy Estimation Model for Health-Care Wireless Sensor Networks.Francisco J. Rincn, Michele Paselli, Joaqun Recas, Qin Zhao, Marcos Snchez-lez, David Atienza, Julien Penders, Giovanni De Micheli
2008WiOptStochastic modeling and analysis for environmentally powered wireless sensor nodes.Alex E. Susu, Andrea Acquaviva, David Atienza, Giovanni De Micheli
2007DATEInteractive presentation: Improving the fault tolerance of nanometric PLA designs.Federico Angiolini, M. Haykel Ben Jamaa, David Atienza, Luca Benini, Giovanni De Micheli
2007ICCADFault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays.M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli
2007ISCASReduction of Register File Delay Due to Process Variability in VLIW Embedded Processors.Praveen Raghavan, Jos L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa Lpez-Vallejo
2007RECOMBAn Efficient Method for Dynamic Analysis of Gene Regulatory Networks andAbhishek Garg, Ioannis Xenarios, Luis Mendoza, Giovanni De Micheli
2006ASPDACMapping and configuration methods for multi-use-case networks on chips.Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006CBMSComputer-Aided Evaluation of Protein Expression in Pathological Tissue Images.Elisa Ficarra, Enrico Macii, Giovanni De Micheli, Luca Benini
2006DACA fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip.David Atienza, Pablo Garca Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias
2006DACA multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip.Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
2006DATEA methodology for mapping multiple use-cases onto networks on chips.Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006ICCADDesigning application-specific networks on chips with floorplan information.Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006ICCDReliability Support for On-Chip Memories Using Networks-on-Chip.Federico Angiolini, David Atienza, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2006ISCCMining Gene Sets for Measuring Similarities.Christine Nardini, Daniele Masotti, Sungroh Yoon, Enrico Macii, Michael D. Kuo, Giovanni De Micheli, Luca Benini
2005ASPDACMapping and physical planning of networks-on-chip architectures with quality-of-service guarantees.Srinivasan Murali, Luca Benini, Giovanni De Micheli
2005ASPDACPerformance driven reliable link design for networks on chips.Rutuparna Tamhankar, Srinivasan Murali, Giovanni De Micheli
2005DATEA Complete Network-On-Chip Emulation Framework.Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Romn Hermida, Francky Catthoor
2005DATEAn Application-Specific Design Methodology for STbus Crossbar Generation.Srinivasan Murali, Giovanni De Micheli
2005DATExpipes Lite: A Synthesis Oriented Design Library For Networks on Chips.Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli
2005ECCBPrediction of regulatory modules comprising microRNAs and target genes.Sungroh Yoon, Giovanni De Micheli
2005ISCASA novel approach for network on chip emulation.Nicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Romn Hermida, Francky Catthoor
2005ISCASSelf-calibrating networks-on-chip.Frederic Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli
2004BIBEEnhanced pClustering and Its Applications to Gene Expression Data.Sungroh Yoon, Christine Nardini, Luca Benini, Giovanni De Micheli
2004DACReliable communication in systems on chips.Giovanni De Micheli
2004DACSUNMAP: a tool for automatic topology selection and generation for NoCs.Srinivasan Murali, Giovanni De Micheli
2004DATEpipesCompiler: A Tool for Instantiating Application Specific Networks on Chip.Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2004DATEBandwidth-Constrained Mapping of Cores onto NoC Architectures.Srinivasan Murali, Giovanni De Micheli
2004DSDReliability and Power Management of Integrated Systems.Kresimir Mihic, Tajana Simunic, Giovanni De Micheli
2003DATEPacketized On-Chip Interconnect Communication Analysis for MPSoC.Terry Tao Ye, Luca Benini, Giovanni De Micheli
2003MEMOCODERobust System Design with Uncertain Information.Giovanni De Micheli
2002DACComplex library mapping for embedded software using symbolic algebra.Armita Peymandoust, Giovanni De Micheli, Tajana Simunic
2002DACAnalysis of power consumption on switch fabrics in network routers.Terry Tao Ye, Giovanni De Micheli, Luca Benini
2002DATELow Power Error Resilient Encoding for On-Chip Data Buses.Davide Bertozzi, Luca Benini, Giovanni De Micheli
2002DATENetworks on Chip: A New Paradigm for Systems on Chip Design.Giovanni De Micheli, Luca Benini
2002DATELow Power Embedded Software Optimization Using Symbolic Algebra.Armita Peymandoust, Tajana Simunic, Giovanni De Micheli
2002ISCASPhysical synthesis for ASIC datapath circuits.Terry Tao Ye, Samit Chaudhuri, Fei Huang, Hamid Savoj, Giovanni De Micheli
2002ISLPEDContents provider-assisted dynamic voltage scaling for low energy multimedia applications.Eui-Young Chung, Giovanni De Micheli, Luca Benini
2001DACUsing Symbolic Algebra in Algorithmic Level DSP Synthesis.Armita Peymandoust, Giovanni De Micheli
2001DACDynamic Voltage Scaling and Power Management for Portable Systems.Tajana Simunic, Luca Benini, Andrea Acquaviva, Peter W. Glynn, Giovanni De Micheli
2001DATEComponent selection and matching for IP-based design.Ting Zhang, Luca Benini, Giovanni De Micheli
2001ICCADSymbolic Algebra and Timing Driven Data-flow Synthesis.Armita Peymandoust, Giovanni De Micheli
2001ISLPEDAutomatic source code specialization for energy reduction.Eui-Young Chung, Luca Benini, Giovanni De Micheli
2000DATEQuantitative Comparison of Power Management Algorithms.Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Giovanni De Micheli, Luca Benini
2000DATEResolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C.Luc Smria, Koichi Sato, Giovanni De Micheli
2000DATEDynamic Power Management of Laptop Hard Disk.Tajana Simunic, Luca Benini, Peter W. Glynn, Giovanni De Micheli
2000ICCADData Path Placement with Regularity.Terry Tao Ye, Giovanni De Micheli
2000ISLPEDOperating-system directed power reduction.Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
2000ISLPEDDo our low-power tools have enough horse power? (panel session) (title only).Giovanni De Micheli, Tony Correale, Pietro Erratico, Srini Raghvendra, Hugo De Man, Jerry Frankil, Vivek Tiwari
2000ISLPEDEnergy efficient design of portable wireless systems.Tajana Simunic, Haris Vikalo, Peter W. Glynn, Giovanni De Micheli
2000MOBICOMDynamic power management for portable systems.Tajana Simunic, Luca Benini, Peter W. Glynn, Giovanni De Micheli
1999DACKernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms.Luca Benini, Giovanni De Micheli, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1999DACCycle-Accurate Simulation of Energy Consumption in Embedded Systems.Tajana Simunic, Luca Benini, Giovanni De Micheli
1999DATEGlitch Power Minimization by Gate Freezing.Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999DATEDynamic Power Management for non-stationary service requests.Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1999DATEHardware Synthesis from C/C++ Models.Giovanni De Micheli
1999DATEPolynomial Methods for Allocating Complex Components.James Smith, Giovanni De Micheli
1999ICCADDynamic power management using adaptive learning tree.Eui-Young Chung, Luca Benini, Giovanni De Micheli
1999ISLPEDSystem-level power optimization: techniques and tools.Luca Benini, Giovanni De Micheli
1999ISLPEDEfficient switching activity computation during high-level synthesis of control-dominated designs.Alessandro Bogliolo, Luca Benini, Bruno Ricc, Giovanni De Micheli
1999ISLPEDEnergy-efficient design of battery-powered embedded systems.Tajana Simunic, Luca Benini, Giovanni De Micheli
1998DACComputational Kernels and their Application to Sequential Power Optimization.Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1998DACPolicy Optimization for Dynamic Power Management.Giuseppe A. Paleologo, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1998DACAutomated Composition of Hardware Components.James Smith, Giovanni De Micheli
1998DATEAddress Bus Encoding Techniques for System-Level Power Optimization.Luca Benini, Giovanni De Micheli, Donatella Sciuto, Enrico Macii, Cristina Silvano
1998DATECharacterization-Free Behavioral Power Modeling.Alessandro Bogliolo, Luca Benini, Giovanni De Micheli
1998FPLAcceleration of Satisfiability Algorithms by Reconfigurable Hardware.Marco Platzner, Giovanni De Micheli
1998ICCADDynamic power management of electronic systems.Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1998ICCADFinding all simple disjunctive decompositions using irredundant sum-of-products forms.Shin-ichi Minato, Giovanni De Micheli
1998ICCADSpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C.Luc Smria, Giovanni De Micheli
1998ICCADPolynomial methods for component matching and verification.James Smith, Giovanni De Micheli
1997DATESymbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997DATEAdaptive least mean square behavioral power modeling.Alessandro Bogliolo, Luca Benini, Giovanni De Micheli
1997ICCADFast power estimation for deterministic input streams.Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997ICCADReal time analysis and priority scheduler generation for hardware-software systems with a synthesized run-time system.Vincent John Mooney III, Giovanni De Micheli
1997ICCADGeneralized matching from theory to application.Patrick Vuillod, Luca Benini, Giovanni De Micheli
1997ISLPEDSystem-level power optimization of special purpose applications: the beach solution.Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
1997ISLPEDRe-mapping for low power under tight timing constraints.Patrick Vuillod, Luca Benini, Giovanni De Micheli
1996DATEDesign for Testability of Gated-Clock FSMs.Michele Favalli, Luca Benini, Giovanni De Micheli
1996ICCDDistributed EDA Tool Integration: The PPP Paradigm.Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1996ISLPEDGate-level current waveform simulation of CMOS integrated circuits.Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Ricc
1996ISLPEDClock skew optimization for peak current reduction.Patrick Vuillod, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1995ISLPEDTransformation and synthesis of FSMs for low-power gated-clock implementation.Luca Benini, Giovanni De Micheli
1994ICCADDynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints.Claudionor Jos Nunes Coelho Jr., Giovanni De Micheli
1994ICCADDecomposition methods for library binding of speed-independent asynchronous designs.Polly Siegel, Giovanni De Micheli
1994ISCASA Synthesis Framework Based on Trace and Automata Theory.Jrme Fron, Jerry Chih-Yuan Yang, Maurizio Damiani, Giovanni De Micheli
1993DACOptimization of Combinational Logic Circuits Based on Compatible Gates.Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli
1993DACAutomatic Technology Mapping for Generalized Fundamental-Mode Asynchronous Designs.Polly Siegel, Giovanni De Micheli, David L. Dill
1993ICCADModeling hierarchical combinational circuits.Jerry R. Burch, David L. Dill, Elizabeth Wolf, Giovanni De Micheli
1992DACRecurrence Equations and the Optimization of Synchronous Logic Circuits.Maurizio Damiani, Giovanni De Micheli
1992DACSynthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components.Rajesh K. Gupta, Claudionor Jos Nunes Coelho Jr., Giovanni De Micheli
1991DACTechnology Mapping for Electrically Programmable Gate Arrays.Silvia Ercolani, Giovanni De Micheli
1991DACControl Optimization Based on Resynchronization of Operations.David C. Ku, Dave Filo, Giovanni De Micheli
1990DACRelative Scheduling Under Timing Constraints.David C. Ku, Giovanni De Micheli
1990ICCADObservability Don't Care Sets and Boolean Relations.Maurizio Damiani, Giovanni De Micheli
1990ICCADPartitioning of Functional Models of Synchronous Digital Systems.Rajesh K. Gupta, Giovanni De Micheli
1989ICCADInserting active delay elements to achieve wave pipelining.Derek C. Wong, Giovanni De Micheli, Michael J. Flynn
1988DACHERCULES - a System for High-Level Synthesis.Giovanni De Micheli, David C. Ku
1988ICCDApproaching a nanosecond: a 32 bit adder.Gary Bewick, Paul Song, Giovanni De Micheli, Michael J. Flynn
1988ICCDAutomatic layout and optimization of static CMOS cells.Frdric Mailhot, Giovanni De Micheli
1983DACPLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays.Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli