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Design, Automation and Test in Europe Conference

DATE

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

9,217

1995–2026

Papers per year

1995445 peak2026

DATE papers

9,217 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2015RTL property abstraction for TLM assertion-based verification.Nicola Bombieri, Riccardo Filippozzi, Graziano Pravadelli, Francesco Stefanni
2015Malleable NoC: dark silicon inspired adaptable Network-on-Chip.Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jrg Henkel, Sri Parameswaran
2015A cyber-physical systems approach to personalized medicine: challenges and opportunities for noc-based multicore platforms.Paul Bogdan
2015dRimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Jos Flich
2015Engine control: task modeling and analysis.Alessandro Biondi, Giorgio C. Buttazzo
2015A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool.Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Branger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, A. Fustier, Julien Michallet, Olivier Faynot, Ogun Turkyilmaz, Jean-Frdric Christmann, Sbastien Thuries, Fabien Clermidy
2015A symbolic system synthesis approach for hard real-time systems based on coordinated SMT-solving.Alexander Biewer, Benjamin Andres, Jens Gladigau, Torsten Schaub, Christian Haubelt
2015Automated rectification methodologies to functional state-space unreachability.Ryan Berryhill, Andreas G. Veneris
2015Designer-level verification: an industrial experience story.Stephen Bergman, Gabor Bobok, Walter Kowalski, Shlomit Koyfman, Shiri Moran, Ziv Nevo, Avigail Orni, Viresh Paruthi, Wolfgang Roesner, Gil Shurek, Vasantha Vuyyuru
2015The federated scheduling of constrained-deadline sporadic DAG task systems.Sanjoy K. Baruah
2015Feature selection for alternate test using wrappers: application to an RF LNA case study.Manuel J. Barragn, Gildas Lger
2015On-line prediction of NBTI-induced aging rates.Rafal Baranowski, Farshad Firouzi, Saman Kiamehr, Chang Liu, Mehdi Baradaran Tahoori, Hans-Joachim Wunderlich
2015Reliable information extraction for single trace attacks.Valentina Banciu, Elisabeth Oswald, Carolyn Whitnall
2015Gait analysis for fall prediction using hierarchical textile-based capacitive sensor arrays.Rebecca Baldwin, Stan Bobovych, Ryan W. Robucci, Chintan Patel, Nilanjan Banerjee
2015Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration.Marco Balboni, Jos Flich, Davide Bertozzi
2015Optimized selection of reliable and cost-effective cyber-physical system architectures.Nikunj Bajaj, Pierluigi Nuzzo, Michael Masin, Alberto L. Sangiovanni-Vincentelli
2015High performance AXI-4.0 based interconnect for extensible smart memory cubes.Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini
2015ECRIPSE: an efficient method for calculating RTN-induced failure probability of an SRAM cell.Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2015Novel inexact memory aware algorithm co-design for energy efficient computation: algorithmic principles.Guru Prakash Arumugam, Prashanth Srikanthan, John Augustine, Krishna V. Palem, Eli Upfal, Ayush Bhargava, Parishkrati, Sreelatha Yenugula
2015On the statistical memory architecture exploration and optimization.Charalampos Antoniadis, Georgios Karakonstantis, Nestor E. Evmorfopoulos, Andreas Peter Burg, George I. Stamoulis
2015Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation.Liliana Andrade, Torsten Maehne, Alain Vachoux, Cdric Ben Aoun, Franois Pcheux, Marie-Minerve Lourat
2015An all-digital spike-based ultra-low-power IR-UWB dynamic average threshold crossing scheme for muscle force wireless transmission.Masoud Shahshahani Amirhossein, Paolo Motto Ros, Alberto Bonanno, Marco Crepaldi, Maurizio Martina, Danilo Demarchi, Guido Masera
2015Optimization of quantum computer architecture using a resource-performance simulator.Muhammad Ahsan, Jungsang Kim
2015Fast eye diagram analysis for high-speed CMOS circuits.Seyed Nematollah Ahmadyan, Chenjie Gu, Suriyaprakash Natarajan, Eli Chiprout, Shobha Vasudevan
2015A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool.Engin Afacan, Gnen Berkol, Ali Emre Pusane, Gnhan Dndar, I. Faik Baskaya
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