| 2025 | DAOP: Data-Aware Offloading and Predictive Pre-Calculation for Efficient MoE Inference. | Yujie Zhang, Shivam Aggarwal, Tulika Mitra |
| 2025 | Side-Channel Collision Attacks Against ASCON. | Hao Zhang, Yiwen Gao, Yongbin Zhou, Jingdian Ming |
| 2025 | LaRED: Efficient IR Drop Predictor with Layout-Preserving Rebuilder-Encoder-Decoder Architecture. | Chengxuan Yu, Yanshuang Teng, Wenhao Dai, Yongjiang Li, Wei W. Xing, Xiao Wu, Dan Niu, Zhou Jin |
| 2025 | Continuous GNN-Based Anomaly Detection on Edge Using Efficient Adaptive Knowledge Graph Learning. | Sanggeon Yun, Ryozo Masukawa, William Youngwoo Chung, Minhyoung Na, Nathaniel D. Bastian, Mohsen Imani |
| 2025 | ConZone: A Zoned Flash Storage Emulator for Consumer Devices. | Dingcui Yu, Jialin Liu, Yumiao Zhao, Wentong Li, Ziang Huang, Zonghuan Yan, Mengyang Ma, Liang Shi |
| 2025 | DSC-ROM: A Fully Digital Sparsity-Compressed Compute-in-ROM Architecture for on-Chip Deployment of Large-Scale DNNs. | Tianyi Yu, Zhonghao Chen, Yiming Chen, Shuang Wang, Yongpan Liu, Huazhong Yang, Xueqing Li |
| 2025 | DyLGNN: Efficient LM-GNN Fine-Tuning with Dynamic Node Partitioning, Low-Degree Sparsity, and Asynchronous Sub-Batch. | Zhen Yu, Jinhao Li, Jiaming Xu, Shan Huang, Jiancai Ye, Ningyi Xu, Guohao Dai |
| 2025 | RT-VirtIO: Towards the Real-Time Performance of VirtIO in a Two-Tier Computing Architecture. | Siwei Ye, Minqing Sun, Huifeng Zhu, Yier Jin, An Zou |
| 2025 | IterL2Norm: Fast Iterative L2-Normalization. | Changmin Ye, Yonguk Sim, Youngchae Kim, SeongMin Jin, Doo Seok Jeong |
| 2025 | SMT-Based Repairing Real-Time Task Specifications. | Anand Yeolekar, Ravindra Metta, Samarjit Chakraborty |
| 2025 | NVSRLO: A FeFET-Based Non-Volatile and SEU-Recoverable Latch Design with Optimized Overhead. | Aibin Yan, Wangjin Jiang, Han Bao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard |
| 2025 | SHWCIM: A Scalable Heterogeneous Workload Computing-in-Memory Architecture. | Yanfeng Yang, Yi Zou, Zhibiao Xue, Liuyang Zhang |
| 2025 | SparSynergy: Unlocking Flexible and Efficient DNN Acceleration Through Multi-Level Sparsity. | Jingkui Yang, Mei Wen, Junzhong Shen, Jianchao Yang, Yasong Cao, Jun He, Minjin Tang, Zhaoyun Chen, Yang Shi |
| 2025 | HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers. | Yiyao Yang, Fu Teng, Pengju Liu, Mengnan Qi, Chenyang Lv, Ji Li, Xuhong Zhang, Zhezhi He |
| 2025 | HEILP: An ILP-Based Scale Management Method for Homomorphic Encryption Compiler. | Weidong Yang, Shuya Ji, Jianfei Jiang, Naifeng Jing, Qin Wang, Zhigang Mao, Weiguang Sheng |
| 2025 | ChipVQA: Benchmarking Visual Language Models for Chip Design. | Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren |
| 2025 | BEAM: A Multi-Channel Optical Interconnect for Multi-GPU Systems. | Chongyi Yang, Bohan Hu, Peiyu Chen, Yinyi Liu, Wei Zhang, Jiang Xu |
| 2025 | Linearization of Quadrature Digital Power Amplifiers by Neural Network of ULR_LSTM: Unsupervised Learning Residual LSTM. | Jiayu Yang, Luyi Guo, Yicheng Li, Wang Wang, Zixu Li, Manni Li, Zijian Huang, Yinyin Lin, Yun Yin, Hongtao Xu |
| 2025 | Hybrid Token Selector based Accelerator for ViTs. | Akshansh Yadav, Anadi Goyal, Palash Das |
| 2025 | Enabling Memory-Efficient On-Device Learning via Dataset Condensation. | Gelei Xu, Ningzhi Tang, Jun Xia, Ruiyang Qin, Wei Jin, Yiyu Shi |
| 2025 | Swift-Sim: A Modular and Hybrid GPU Architecture Simulation Framework. | Xiangrong Xu, Yuanqiu Lv, Liang Wang, Limin Xiao, Meng Han, Runnan Shen, Jinquan Wang |
| 2025 | LT-OAQ: Learnable Threshold Based Outlier-Aware Quantization and its Energy-Efficient Accelerator for Low-Precision On-Chip Training. | Qinkai Xu, Yijin Liu, Yuan Meng, Yang Chen, Yunlong Mao, Li Li, Yuxiang Fu |
| 2025 | Compact Non-Volatile Lookup Table Architecture Based on Ferroelectric FET Array Through In-Situ Combinatorial One-Hot Encoding for Reconfigurable Computing. | Weikai Xu, Meng Li, Qianqian Huang, Ru Huang |
| 2025 | Ensuring Data Freshness for In-Storage Computing with Cooperative Buffer Manager. | Jin Xue, Yuhong Song, Yang Guo, Zili Shao |
| 2025 | FineQ: Software-Hardware Co-Design for Low-Bit Fine-Grained Mixed-Precision Quantization of LLMs. | Xilong Xie, Liang Wang, Limin Xiao, Meng Han, Lin Sun, Shuai Zheng, Xiangrong Xu |