| 2006 | Cascade Scheme for Concurrent Errors Detection. | Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladimir Sinelnikov |
| 2006 | Embedded Parallel Systems Based on Dynamic Look-Ahead Reconfiguration in Redundant Communication Resources. | Eryk Laskowski, Marek S. Tudruj |
| 2006 | Global Analysis of Resource Arbitration for MPSoC. | Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. van Meerbergen, Yajun Ha |
| 2006 | Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA. | Ari Kulmala, Timo D. Hmlinen, Marko Hnnikinen |
| 2006 | Dependable Design for FPGA Based on Duplex System and Reconfiguration. | Pavel Kubalk, Radek Dobias, Hana Kubtov |
| 2006 | BCB: A Buffered CrossBar Switch Fabric Utilizing Shared Memory. | George Kornaros |
| 2006 | An Efficient Reconfigurable Montgomery Multiplier Architecture for GF(n). | Ramachandruni Venkata Kamala, M. Sudhakar, M. B. Srinivas |
| 2006 | Multi-objective Optimal FSM State Assignment. | Lech Jzwiak, Aleksander Slusarczyk, Dominik Gawlowski |
| 2006 | Quality-Driven Template-Based Architecture Synthesis for Real-time Embedded SoCs. | Lech Jzwiak, Sien-An Ong |
| 2006 | Mapping of Fault-Tolerant Applications with Transparency on Distributed Embedded Systems*. | Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng |
| 2006 | Performance Improvement for H.264 Video Encoding using ILP Embedded Processor. | Ali R. Iranpour, Krzysztof Kuchcinski |
| 2006 | A Computation Core for Communication Refinement of Digital Signal Processing Algorithms. | Sylvain Huet, Emmanuel Casseau, Olivier Pasquier |
| 2006 | Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions. | Rickard Holsmark, Maurizio Palesi, Shashi Kumar |
| 2006 | A Linear Convergent Functional Iterative DivisionWithout a Look-Up Table. | Viay Holimath, Javier D. Bruguera |
| 2006 | Function Call Optimization in Behavioral Synthesis. | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
| 2006 | Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core. | Panu Hmlinen, Timo Alho, Marko Hnnikinen, Timo D. Hmlinen |
| 2006 | Scan-Based SoC Test Using Space / Time Pattern Compaction Schemes. | Christian Galke, U. Gtzschmann, Heinrich Theodor Vierhaus |
| 2006 | Deep Sub-100 nm Design Challenges. | Tohru Furuyama |
| 2006 | A Hardware IP-Core for Information Retrieval. | Michael Freeman, Thimal Jayasooriya |
| 2006 | Evaluating Dataflow and Pipelined Vector Processing Architectures for FPGA Co-processors. | Michael Freeman |
| 2006 | Multi-Bank Main Memory Architecture with Dynamic Voltage Frequency Scaling for System Energy Optimization. | Hanene Ben Fradj, Ccile Belleudy, Michel Auguin |
| 2006 | Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography. | Jacques J. A. Fournier, Simon W. Moore |
| 2006 | Flexible Two-Level Boolean Minimizer BOOM-II and Its Applications. | Petr Fiser, Hana Kubtov |
| 2006 | Automata Construct with Genetic Algorithm. | Vt Fbera, Vlastimil Jnes, Mria Jnesov |
| 2006 | The Challenges for High Performance Embedded Systems. | Marc Duranton |