| 1996 | Memory Hierarchy Synthesis of a Multimedia Embedded Processor. | Steve Fu |
| 1996 | Multiplexor Network Generation in High Level Synthesis. | Yung-Ming Fang, D. F. Wong |
| 1996 | Profile-Driven Generation of Trace Samples. | Pradeep K. Dubey, Ravi Nair |
| 1996 | A CAM-Based VLSI Architecture for Shared Buffer ATM Switch with Fuzzy Controlled Buffer Management. | Chie Dou, Ming-Der Shieh |
| 1996 | Future Challenges of Deep Sub-Micron Processer Design. | Mark Dermott |
| 1996 | Modeling the Technology Impact on the Design of a Two-Level Multicomputer Interconnection Network. | Jos Cruz-Rivera, D. Scott Wills, Thomas K. Gaylord, Elias N. Glytsis |
| 1996 | Exact Dichotomy-based Constrained Encodi. | Olivier Coudert, C.-J. Richard Shi |
| 1996 | Reducing State Loss For Effective Trace Sampling of Superscalar Processors. | Thomas M. Conte, Mary Ann Hirsch, Kishore N. Menezes |
| 1996 | An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig. | Jason Cong, Chang Wu |
| 1996 | A Compact Neural Network Based CDMA Receiver for Multimedia Wireless Communication. | David C. Chen, Bing J. Sheu, Theodore W. Berger |
| 1996 | Enhancing FSM Traversal by Temporary Re-Encoding. | Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich |
| 1996 | Design Tradeoffs and Experience with Motorola PowerPC? Migration Tool. | Maurcio Breternitz Jr., A. Manikonda, M. Ommerman, W. Su, A. Thornto |
| 1996 | Can Trace-Driven Simulators Accurately Predict Superscalar Performance? | Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen |
| 1996 | Dichotomy-based Model for FSM Power Minimization. | Lakshmikant Bhupathi, Liang-Fang Chao |
| 1996 | Implicit Test Sequences Compaction for Decreasing Test Application Cos. | Roberto Bevacqua, Luca Guerrazzi, Fabrizio Ferrandi, Franco Fummi |
| 1996 | Boolean Function Representation Based on Disjoint-Support Decompositions. | Valeria Bertacco, Maurizio Damiani |
| 1996 | Distributed EDA Tool Integration: The PPP Paradigm. | Luca Benini, Alessandro Bogliolo, Giovanni De Micheli |
| 1996 | Testing of embedded A/D converters in mixed-signal circuit. | Naim Ben-Hamida, Bechir Ayari, Bozena Kaminska |
| 1996 | A VLSI chip for image compression using variable block size segmentation. | S. B. Aruru, N. Ranganathan, Kameswara Rao Namuduri |
| 1996 | Distributed Binary Decision Diagrams for Verification of Large Circuit. | Prakash Arunachalam, Craig M. Chase, Dinos Moundanos |
| 1996 | A Method for Analog Circuits Visualization. | Bogdan G. Arsintescu |
| 1996 | Design for testability of integrated operational amplifiers using oscillation-test strategy. | Karim Arabi, Bozena Kaminska, Stephen K. Sunter |
| 1996 | A Scalable Resistor-less PLL Design for PowerPCTM Microprocessors. | Jose Alvarez, Hector Sanchez, Roger Countryman, Mike Alexander, Carmine Nicoletta, Gianfranco Gerosa |
| 1996 | An integrated microspacecraft avionics architecture using 3D multichip module building blocks. | Leon Alkalai, Wai-Chi Fang |
| 1996 | Embedded Systems Design with Frontend Compilers. | C. Alba, Luigi Carro, A. Lima, Altamiro Amadeu Susin |