| 2026 | VLSID | Flash-Based Dynamic Dot Product Acceleration. | Kyler R. Scott, Sunil P. Khatri |
| 2025 | ASPDAC | A Novel Mixed-Signal Flash-based Finite Impulse Response (FFIR) Filter for IoT Applications. | Cheng-Yen Lee, Sunil P. Khatri, Ali Ghrayeb |
| 2024 | IECON | Self-Adaptive Physics Informed Neural Network for Paper Insulation Degree of Polymerization Prediction. | Alamera Nouran Alquennah, Mohammad AlShaikh Saleh, Ali Ghrayeb, Haitham Abu-Rub, Shady S. Refaat, Mohammed Abdullah Al-Hajri, Sunil P. Khatri |
| 2023 | ISCAS | An Extremely Low-voltage Floating Gate Artificial Neuron. | Kyler R. Scott, Sunil P. Khatri |
| 2023 | ISLPED | Scaled Population Division for Approximate Computing. | Kunal Bharathi, Sunil P. Khatri, Jiang Hu |
| 2022 | DATE | A Flash-based Current-mode IC to Realize Quantized Neural Networks. | Kyler R. Scott, Cheng-Yen Lee, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2022 | FPL | TD3lite: FPGA Acceleration of Reinforcement Learning with Structural and Representation Optimizations. | Chan-Wei Hu, Jiang Hu, Sunil P. Khatri |
| 2022 | ICCD | A Flash-based Digital to Analog Converter for Low Power Applications. | Kyler R. Scott, Sunil P. Khatri |
| 2021 | ICCD | NIST-Lite: Randomness Testing of RNGs on an Energy-Constrained Platform. | Cheng-Yen Lee, Kunal Bharathi, Joellen Lansford, Sunil P. Khatri |
| 2021 | ICCD | CIDAN: Computing in DRAM with Artificial Neurons. | Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri |
| 2020 | ASPDAC | Scaled Population Arithmetic for Efficient Stochastic Computing. | He Zhou, Sunil P. Khatri, Jiang Hu, Frank Liu |
| 2020 | ICCD | Scaled Population Subtraction for Approximate Computing. | Kunal Bharathi, Jiang Hu, Sunil P. Khatri |
| 2020 | ICCD | A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. | Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2019 | DAC | A Memory-Efficient Markov Decision Process Computation Framework Using BDD-based Sampling Representation. | He Zhou, Sunil P. Khatri, Jiang Hu, Frank Liu |
| 2019 | ICCD | Threshold Logic in a Flash. | Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2018 | ICCD | A Plain-Text Incremental Compression (PIC) Technique with Fast Lookup Ability. | Kunal Bharathi, Harsh Kumar, Abbas A. Fairouz, Ahmad Al Kawam, Sunil P. Khatri |
| 2018 | ICCD | Synchronization of Ring-Based Resonant Standing Wave Oscillators for 3D Clocking Applications. | Andrew J. Douglass, Sunil P. Khatri |
| 2017 | ICCD | Fast, Ring-Based Design of 3D Stacked DRAM. | Andrew J. Douglass, Sunil P. Khatri |
| 2017 | ICCD | An FPGA-Based Coprocessor for Hash Unit Acceleration. | Abbas A. Fairouz, Sunil P. Khatri |
| 2016 | FUSION | A GPU-based implementation of a sensor tasking methodology. | Monther Abusultan, Suman Chakravorty, Sunil P. Khatri |
| 2016 | ICCAD | A flash-based digital circuit design flow. | Monther Abusultan, Sunil P. Khatri |
| 2016 | ICCD | Implementing low power digital circuits using flash devices. | Monther Abusultan, Sunil P. Khatri |
| 2016 | ICCD | Exploring static and dynamic flash-based FPGA design topologies. | Monther Abusultan, Sunil P. Khatri |
| 2016 | ICCD | A novel hardware hash unit design for modern microprocessors. | Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri |
| 2015 | ICCD | Exploring the viability of stochastic computing. | Joao Marcos de Aguiar, Sunil P. Khatri |
| 2014 | FCCM | Look-up Table Design for Deep Sub-threshold through Full-Supply Operation. | Monther Abusultan, Sunil P. Khatri |
| 2014 | FPGA | FPGA LUT design for wide-band dynamic voltage and frequency scaled operation (abstract only). | Monther Abusultan, Sunil P. Khatri |
| 2014 | ICCD | An asynchronous Network-on-Chip router with low standby power. | Amr Elshennawy, Sunil P. Khatri |
| 2014 | ICCD | An area-efficient Ternary CAM design using floating gate transistors. | Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri |
| 2014 | VLSID | Techniques to Improve the Efficiency of SAT Based Path Delay Test Generation. | Kun Bian, D. M. H. Walker, Sunil P. Khatri |
| 2013 | DATE | Crosstalk avoidance codes for 3D VLSI. | Rajeev Kumar, Sunil P. Khatri |
| 2013 | DATE | Exploring topologies for source-synchronous ring-based network-on-chip. | Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra |
| 2013 | ICCD | Noise-based algorithms for functional equivalence and tautology checking. | Pey-Chang Kent Lin, Sunil P. Khatri |
| 2013 | ICCD | A low-jitter phase-locked resonant clock generation and distribution scheme. | Ayan Mandal, Kalyana C. Bollapalli, Nikhil Jayakumar, Sunil P. Khatri, Rabi N. Mahapatra |
| 2012 | DAC | Application of logic synthesis to the understanding and cure of genetic diseases. | Pey-Chang Kent Lin, Sunil P. Khatri |
| 2012 | DAC | Boolean satisfiability using noise based logic. | Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri |
| 2012 | DATE | A fast, source-synchronous ring-based network-on-chip design. | Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra |
| 2012 | ICCD | An efficient arithmetic Sum-of-Product (SOP) based multiplication approach for FIR filters and DFT. | Rajeev Kumar, Ayan Mandal, Sunil P. Khatri |
| 2012 | ICCD | Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design. | Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra |
| 2012 | ICCD | Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening. | Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri |
| 2011 | ICCD | A novel cryptographic key exchange scheme using resistors. | Pey-Chang Kent Lin, Alex Ivanov, Bradley Johnson, Sunil P. Khatri |
| 2011 | VLSID | An Automated Approach for Minimum Jitter Buffered H-Tree Construction. | Ayan Mandal, Nikhil Jayakumar, Kalyana C. Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra |
| 2011 | VLSID | Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution Circuits. | Ayan Mandal, Vinay Karkala, Sunil P. Khatri, Rabi N. Mahapatra |
| 2010 | DATE | Implementing digital logic with sinusoidal supplies. | Kalyana C. Bollapalli, Sunil P. Khatri, Laszlo B. Kish |
| 2010 | DCC | A SAT-Based Scheme to Determine Optimal Fix-Free Codes. | Navid Abedini, Sunil P. Khatri, Serap A. Savari |
| 2010 | ICCAD | Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT. | Vinay Karkala, Joseph Wanstrath, Travis Lacour, Sunil P. Khatri |
| 2010 | ISCAS | An efficient pulse flip-flop based launch-on-shift scan cell. | Rajesh Kumar, Sunil P. Khatri |
| 2009 | ASPDAC | Efficient analytical determination of the SEU-induced pulse shape. | Rajesh Garg, Sunil P. Khatri |
| 2009 | ASPDAC | Fast circuit simulation on graphics processing units. | Kanupriya Gulati, John F. Croix, Sunil P. Khatri, Rahm Shastry |
| 2009 | ASPDAC | Accelerating statistical static timing analysis using graphics processing units. | Kanupriya Gulati, Sunil P. Khatri |
| 2009 | FPGA | Closed-loop modeling of power and temperature profiles of FPGAs. | Kanupriya Gulati, Sunil P. Khatri, Peng Li |
| 2009 | ICCAD | Introduction to GPU programming for EDA. | John F. Croix, Sunil P. Khatri |
| 2009 | ICCD | On-chip bidirectional wiring for heavily pipelined systems using network coding. | Kalyana C. Bollapalli, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri |
| 2009 | ICCD | 3D simulation and analysis of the radiation tolerance of voltage scaled digital circuit. | Rajesh Garg, Sunil P. Khatri |
| 2009 | ICCD | A PLL design based on a standing wave resonant oscillator. | Vinay Karkala, Kalyana C. Bollapalli, Rajesh Garg, Sunil P. Khatri |
| 2009 | ICCD | A robust pulsed flip-flop and its use in enhanced scan design. | Rajesh Kumar, Kalyana C. Bollapalli, Rajesh Garg, Tarun Soni, Sunil P. Khatri |
| 2009 | ICCD | A radiation tolerant Phase Locked Loop design for digital electronics. | Rajesh Kumar, Vinay Karkala, Rajesh Garg, Tanuj Jindal, Sunil P. Khatri |
| 2009 | ISCAS | Sorting Binary Numbers in Hardware - A Novel Algorithm and its Implementation. | Srikanth Alaparthi, Kanupriya Gulati, Sunil P. Khatri |
| 2008 | DAC | Forbidden transition free crosstalk avoidance CODEC design. | Chunjie Duan, Chengyu Zhu, Sunil P. Khatri |
| 2008 | DAC | A fast, analytical estimator for the SEU-induced pulse width in combinational designs. | Rajesh Garg, Charu Nagpal, Sunil P. Khatri |
| 2008 | DAC | Towards acceleration of fault simulation using graphics processing units. | Kanupriya Gulati, Sunil P. Khatri |
| 2008 | DATE | Clock Distribution Scheme using Coplanar Transmission Lines. | Victor H. Cordero Calle, Sunil P. Khatri |
| 2008 | DATE | Energy Efficient and High Speed On-Chip Ternary Bus. | Chunjie Duan, Sunil P. Khatri |
| 2008 | DATE | A Single-supply True Voltage Level Shifter. | Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri |
| 2008 | DATE | A Delay-efficient Radiation-hard Digital Design Approach Using CWSP Elements. | Charu Nagpal, Rajesh Garg, Sunil P. Khatri |
| 2008 | ICCD | A novel, highly SEU tolerant digital circuit design approach. | Rajesh Garg, Sunil P. Khatri |
| 2008 | ISCAS | Modeling dynamic stability of SRAMS in the presence of single event upsets (SEUs). | Rajesh Garg, Peng Li, Sunil P. Khatri |
| 2008 | VLSID | A Merged Synthesis Technique for Fast Arithmetic Blocks Involving Sum-of-Products and Shifters. | Sabyasachi Das, Sunil P. Khatri |
| 2008 | VLSID | A Timing-Driven Synthesis Technique for Arithmetic Product-of-Sum Expressions. | Sabyasachi Das, Sunil P. Khatri |
| 2008 | VLSID | An Inversion-Based Synthesis Approach for Area and Power Efficient Arithmetic Sum-of-Products. | Sabyasachi Das, Sunil P. Khatri |
| 2007 | DATE | An algorithm to minimize leakage through simultaneous input vector control and circuit modification. | Nikhil Jayakumar, Sunil P. Khatri |
| 2007 | DSD | Toggle Equivalence Preserving (TEP) Logic Optimization. | Eugene Goldberg, Kanupriya Gulati, Sunil P. Khatri |
| 2007 | ISCAS | A Structured ASIC Design Approach Using Pass Transistor Logic. | Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri |
| 2006 | ASPDAC | Controlling inductive cross-talk and power in off-chip buses using CODECs. | Brock J. LaMeres, Kanupriya Gulati, Sunil P. Khatri |
| 2006 | DAC | A design approach for radiation-hard digital electronics. | Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan Choi |
| 2006 | DAC | A PLA based asynchronous micropipelining approach for subthreshold circuit design. | Nikhil Jayakumar, Rajesh Garg, Bruce Gamache, Sunil P. Khatri |
| 2006 | DATE | Bus stuttering: an encoding technique to reduce inductive noise in off-chip data transmission. | Brock J. LaMeres, Sunil P. Khatri |
| 2006 | ICASSP | A High-Speed Fully-Programmable VLSI Decoder for Regular LDPC Codes. | Euncheol Kim, Nikhil Jayakumar, Pankaj Bhagawat, Anand Selvarathinam, Gwan Choi, Sunil P. Khatri |
| 2006 | ICCAD | Network coding for routability improvement in VLSI. | Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson |
| 2006 | ICCD | On the Improvement of Statistical Static Timing Analysis. | Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri |
| 2006 | ICCD | CMOS Comparators for High-Speed and Low-Power Applications. | Eric Menendez, Dumezie Maduike, Rajesh Garg, Sunil P. Khatri |
| 2006 | ICCD | An Efficient, Scalable Hardware Engine for Boolean SATisfiability. | Mandar Waghmode, Kanupriya Gulati, Sunil P. Khatri, Weiping Shi |
| 2006 | ISCAS | Memory-based crosstalk canceling CODECs for on-chip buses. | Chunjie Duan, Kanupriya Gulati, Sunil P. Khatri |
| 2006 | ISCAS | Computing during supply voltage switching in DVS enabled real-time processors. | Chunjie Duan, Sunil P. Khatri |
| 2006 | ISCAS | Generalized buffering of PTL logic stages using Boolean division. | Rajesh Garg, Sunil P. Khatri |
| 2006 | ISCAS | A probabilistic method to determine the minimum leakage vector for combinational designs. | Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri |
| 2006 | ISCAS | Efficient don't care computation for hierarchical designs. | Kanupriya Gulati, M. Lovell, Sunil P. Khatri |
| 2005 | ASPDAC | A dynamic voltage scaling algorithm for energy reduction in hard real-time systems. | Van R. Culver, Sunil P. Khatri |
| 2005 | DAC | A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents. | Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri |
| 2005 | DAC | A variation tolerant subthreshold design approach. | Nikhil Jayakumar, Sunil P. Khatri |
| 2005 | DATE | Encoding-Based Minimization of Inductive Cross-Talk for Off-Chip Data Transmission. | Brock J. LaMeres, Sunil P. Khatri |
| 2005 | ICCAD | Practical techniques to reduce skew and its variations in buffered clock networks. | Ganesh Venkataraman, Nikhil Jayakumar, Jiang Hu, Peng Li, Sunil P. Khatri, Anand Rajaram, Patrick McGuinness, Charles J. Alpert |
| 2005 | ICCD | X-Routing using Two Manhattan Route Instances. | Seraj Ahmad, Nikhil Jayakumar, Vijay Balasubramanian, Edward Hursey, Sunil P. Khatri, Rabi N. Mahapatra |
| 2005 | ICCD | Minimum Energy Near-threshold Network of PLA based Design. | Nikhil Jayakumar, Sunil P. Khatri |
| 2005 | ICCD | Broadband Impedance Matching for Inductive Interconnect in VLSI Packages. | Brock J. LaMeres, Sunil P. Khatri |
| 2005 | ISCAS | Performance model for inter-chip communication considering inductive cross-talk and cost. | Brock J. LaMeres, Sunil P. Khatri |
| 2005 | ISLPED | An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. | Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri |
| 2005 | ITC | Efficient SAT-based combinational ATPG using multi-level don't-cares. | Nikhil Saluja, Sunil P. Khatri |
| 2005 | VLSID | Non-Manhattan Routing Using a Manhattan Router. | Edward Hursey, Nikhil Jayakumar, Sunil P. Khatri |
| 2004 | DAC | A robust algorithm for approximate compatible observability don't care (CODC) computation. | Nikhil Saluja, Sunil P. Khatri |
| 2004 | DATE | Exploiting Crosstalk to Speed up On-Chip Buse. | Chunjie Duan, Sunil P. Khatri |
| 2004 | GLOBECOM | High-throughput VLSI implementations of iterative decoders and related code construction problems. | Vijay Nagarajan, Nikhil Jayakumar, Sunil P. Khatri, Olgica Milenkovic |
| 2004 | ICCAD | A metal and via maskset programmable VLSI design methodology using PLAs. | Nikhil Jayakumar, Sunil P. Khatri |
| 2004 | ICCAD | A novel clock distribution and dynamic de-skewing methodology. | Arjun Kapoor, Nikhil Jayakumar, Sunil P. Khatri |
| 2003 | ICCCN | A fast ternary CAM design for IP networking applications. | Bruce Gamache, Zachary Pfeffer, Sunil P. Khatri |
| 2003 | ISLPED | An ASIC design methodology with predictably low leakage, using leakage-immune standard cells. | Nikhil Jayakumar, Sunil P. Khatri |
| 2001 | HOTI | Analysis and avoidance of cross-talk in on-chip buses. | Chunjie Duan, Anup Tirumala, Sunil P. Khatri |
| 2001 | ICCAD | Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement. | Wilsin Gosti, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli |
| 2000 | ICCAD | Cross-Talk Immune VLSI Design Using a Network of PLAs Embedded in a Regular Layout Fabric. | Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 2000 | ICCD | Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks. | Subarnarekha Sinha, Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1999 | DAC | A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. | Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli |
| 1999 | VLSID | Multi-Valued Logic Synthesis. | Robert K. Brayton, Sunil P. Khatri |
| 1999 | VLSID | Sequential Multi-Valued Network Simplification using Redundancy Removal. | Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1996 | CAV | VIS: A System for Verification and Synthesis. | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa |
| 1996 | DAC | Engineering Change in a Non-Deterministic FSM Setting. | Sunil P. Khatri, Amit Narayan, Sriram C. Krishnan, Kenneth L. McMillan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1996 | FMCAD | VIS. | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa |
| 1996 | FMCAD | Decomposition Techniques for Efficient ROBDD Construction. | Jawahar Jain, Amit Narayan, C. Coelho, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Masahiro Fujita |
| 1996 | VLSID | A study of composition schemes for mixed apply/compose based construction of ROBDDs. | Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masahiro Fujita, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |