| 1990 | On-the-fly circuit to measure the average working set size. | Kwangkeun Yi, Luddy Harrison |
| 1990 | Formal semantics of UDL/I and its applications to CAD/DA tools. | Hiroto Yasuura, Nagisa Ishiura |
| 1990 | Digital magnetic recording systems. | Jack Keil Wolf |
| 1990 | Task assignment by parallel simulated annealing. | Ellen E. Witte, Roger D. Chamberlain, Mark A. Franklin |
| 1990 | Design of repairable and fully testable folded PLAs. | Chin-Long Wey, Jyhyeung Ding |
| 1990 | Automatic generation of control circuits in pipelined DSP architectures. | Ching-Yi Wang, Keshab K. Parhi |
| 1990 | On the estimation of logic complexity for design automation applications. | Devadas Varma, Eliezer A. Trachtenberg |
| 1990 | Exploitation of operation-level parallelism in a processor of the CRAY X-MP. | Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu |
| 1990 | A reduced area scheme for carry-select adders. | Akhilesh Tyagi |
| 1990 | An approach to 150 K gate low power ECL cell based integrated circuits. | G. Taylor, G. Sanguinetti, R. Lane |
| 1990 | HAL III: function level hardware logic simulation. | Shigeru Takasaki, Nobuyoshi Nomizu, Yoshihiro Hirabayashi, Hiroshi Ishikura, Masahiro Kurashita, Nobuhiko Koike, Toshiyuki Nakata |
| 1990 | Concurrent testing of VLSI circuits using conservative logic. | Gnanasekaran Swaminathan, James H. Aylor, Barry W. Johnson |
| 1990 | Test architecture of the Motorola 68040. | Thomas Spohrer, Danny Marquette, Michael Gallup |
| 1990 | Design issues of a rate 8/10 matched-spectral-null trellis code chip for partial response channels. | C. Bernard Shung, Paul H. Siegel, Hemant K. Thapar, Razmik Karabed |
| 1990 | A file-based adaptive prefetch caching design. | F. Warren Shih, Tze Chiang Lee, Shauchi Ong |
| 1990 | A global feedback detection algorithm for VLSI circuits. | H.-C. Shih, Predrag G. Kovijanic, Rahul Razdan |
| 1990 | Wavefront array processor for video applications. | Ulrich Schmidt, Snke Mehrgardt |
| 1990 | An improved algorithm for the minimization of mixed polarity Reed-Muller representations. | J. M. Saul |
| 1990 | Boolean technology mapping for both ECI and CMOS circuits based on permissible functions and binary decision diagrams. | Hitomi Sato, Norikazu Takahashi, Yusuke Matsunaga, Masahiro Fujita |
| 1990 | Fault grading of large digital systems. | Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Joseph T. Rahmeh, Jacob A. Abraham |
| 1990 | Towards a VLSI packaging design support environment (PDSE); concepts and implementation. | Jerzy W. Rozenblit, John L. Prince, Olgierd A. Palusinski |
| 1990 | A 75 MHz CMOS digital convolver. | P. J. Rose, B. G. Koether |
| 1990 | Modular BIST concept for microprocessors. | Hartmut C. Ritter, Thomas M. Schwair |
| 1990 | An analog parallel distributed solution to the shortest path problem. | Scott E. Ritter, K. Soumyanath |
| 1990 | Reliability analysis of a computer system for a data collection application. | Andrew L. Reibman |