| 1990 | Experiments with an efficient heuristic algorithm for local microcode generation. | M. Mahmood, Farhad Mavaddat, M. I. Elmastry |
| 1990 | Formal verification of cache systems using refinement relations. | Paul Loewenstein, David L. Dill |
| 1990 | A linear time algorithm for optimal CMOS functional cell layouts. | Po-Yang F. Lin, Kazuo Nakajima |
| 1990 | Accurate interconnect modeling for high frequency LSI/VLSI circuits and systems. | C. G. Lin-Hendel |
| 1990 | SYLON-REDUCE: an MOS network optimization algorithms using permissible functions. | Johnson Chan Limqueco, Saburo Muroga |
| 1990 | BiCMOS fault models: is stuck-at adequate? | Marc E. Levitt, Kaushik Roy, Jacob A. Abraham |
| 1990 | Empirical evaluation of randomly-wire multistage networks. | Tom Leighton, Derek Linsinski, Bruce M. Maggs |
| 1990 | Parallel digital image restoration using adaptive VLSI neural chips. | Ji-Chien Lee, Bing J. Sheu |
| 1990 | Test generation in circuits constructed by input decomposition. | Gueesang Lee, Mary Jane Irwin, Robert Michael Owens |
| 1990 | Design and application trade-offs between high-density and high-speed ASICs. | Patrick Lampin, J. C. Le Garrec, C. Marion, J. P. Mifsud, T. Mille, S. Nicot, B. Rousseau, R. Saura, T. Tatry, C. John Glossner, R. D. Kilmoyer |
| 1990 | Simultaneous bidirectional signalling for IC systems. | Kevin Lam, Larry R. Dennison, William J. Dally |
| 1990 | A functional diagnostics methodology. | Ramachandra P. Kunda, Bharat Deep Rathi |
| 1990 | An efficient parallel algorithm for channel routing. | Sridhar Krishnamurthy, Joseph F. JJ |
| 1990 | Associative and data processing Mbit-DRAM. | Oskar Kowarik, Rainer Kraus, Kurt Hoffmann, Karl H. Horninger |
| 1990 | ASIC design using the high-level synthesis system CALLAS: a case study. | Michael Koster, Martin Geiger, Peter Duzy |
| 1990 | Rule-based testability rule check program. | Yasushi Koseko, C. Hiramine, Takuji Ogihara, Shinichi Murai |
| 1990 | A parallel algorithm for constructing binary decision diagrams. | Shinji Kimura, Edmund M. Clarke |
| 1990 | A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations. | Akira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto |
| 1990 | High speed VLSI logic simulation using bitwise operations and parallel processing. | Young-Hyun Jun, Ibrahim N. Hajj, Sang-Heon Lee, Song-Bai Park |
| 1990 | Design of robustly testable static CMOS parity trees derived from binary decision diagrams. | Niraj K. Jha, Carol Q. Tong |
| 1990 | BiCMOS design overview and implementation methodology. | Ramesh S. Iyer |
| 1990 | Application specific microprocessor [NS3200/EP family]. | Gideon D. Intrater, Dan Biran |
| 1990 | Logic synthesis for programmable logic devices. | TingTing Hwang, Robert Michael Owens, Mary Jane Irwin |
| 1990 | Early resolution of address translation in cache design. | Kien A. Hua, A. Hunt, L. Liu, J.-K. Peir, D. Pruett, J. Temple |
| 1990 | Figures of merit for system path time estimation. | C. George Hsi, Stuart G. Tucker |