| 2025 | Optimization of Wire Pipelining and Channel Parallelism for 2D-Mesh NoC Physical Design. | Pei-Huan Tsai, Maico Cassel dos Santos, Joseph Zuckerman, Kuan-Lin Chiu, Luca P. Carloni |
| 2025 | DMP-BFP: Dynamic Mixed-Precision Block Floating-Point and Exponent-Guided Precision Adjustment. | Yu-Chih Tsai, Chia-Cheng Chang, Ren-Shuo Liu |
| 2025 | Scaling Up the Sustainability of Photonic Tensor Cores With Device-Circuit-Signaling Co-Design. | Ishan G. Thakkar, Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi, Oluwaseun Adewunmi Alo |
| 2025 | Recovering QSVT Polynomials from Side-Channel Information on Quantum Computers. | Kidus Tessma, Hrvoje Kukina, Jakub Szefer |
| 2025 | Supporting Pipelined Memory Accesses in Processor Synthesis. | Essien Taylor, Colin Schilf, Sebastian Phemister, Russ Joseph |
| 2025 | ECOLogic: Enabling Circular, Obfuscated, and Adaptive Logic via eFPGA-Augmented SoCs. | Ishraq Tashdid, Dewan Saiham, Nafisa Anjum, Tasnuva Farheen, Sazadur Rahman |
| 2025 | DualSpar: A Dual-Granularity Memory Framework with Adaptive Sparsity for Efficient LLM Inference. | Yujuan Tan, Jiayi Guo, Zhuoxin Bai, Sanle Zhao, Yujiao Wang, Zongjie Wang, Ao Ren, Kan Zhong, Lin Huang, Jun Liu |
| 2025 | MALLS: Multi-Agent LLMs for Synthetic Hardware Vulnerability Generation and Detection. | Jonti Talukdar, Agastya Seth, Sanmitra Banerjee, Farshad Firouzi, Krishnendu Chakrabarty |
| 2025 | LM-Fix: Lightweight Bit-Flip Detection and Rapid Recovery Framework for Language Models. | Ahmad Tahmasivand, Noureldin Zahran, Saba Al-Sayouri, Mohamed E. Fouda, Khaled N. Khasawneh |
| 2025 | Sustainable Acceleration of Generative AI Neural Network Models with Silicon Photonics. | Tharini Suresh, Salma Afifi, Sudeep Pasricha |
| 2025 | Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate Booth Encodings. | Chandan Kumar N. S, Bhavana S, Ajitesh Kumar Singh, Madhav Rao |
| 2025 | Computing-in-Memory Dataflow for Minimal Buffer Traffic. | Choongseok Song, Doo Seok Jeong |
| 2025 | Representation Learning for Digital Integrated Circuit Design Automation. | Pratik Shrestha, Ioannis Savidis |
| 2025 | HElix: Genome Similarity Detection in the Encrypted Domain. | Rostin Shokri, Charles Gouert, Nektarios Georgios Tsoutsos |
| 2025 | HBM-Aware Number Theoretic Transform Accelerator for Zero-Knowledge Proof. | Sangwon Shin, Ngoc-Son Pham, Lei Xu, Weidong Shi, Taeweon Suh |
| 2025 | Timing-Driven Multi-Bit Flip-Flop Allocation Utilizing Design-Technology Co-Optimization Techniques. | Yeongyeong Shin, Sehyeon Chung, Taewhan Kim |
| 2025 | AuLoRA: Fine-Grained Loading and Computation Orchestration for Efficient LoRA LLM Serving. | Xiao Shi, Jiangsu Du, Zhiguang Chen, Yutong Lu |
| 2025 | OpenYield: An Open-Source SRAM Yield Analysis and Optimization Benchmark Suite. | Shan Shen, Xingyang Li, Zhuohua Liu, Junhao Ma, Yikai Wang, Yiheng Wu, Yuquan Sun, Wei W. Xing |
| 2025 | Taming Sparse Giants: Deploying Mixture-of-Experts on 3D Heterogeneous Compute-in-Memory Systems. | Pragya Sharma, Ashish Reddy Bommana, Farshad Firouzi, Krishnendu Chakrabarty |
| 2025 | Pixel-DNA: Increasing Robustness of Approximate DNA Storage for Images by Using Hierarchical Deduplication. | Alex Sensintaffar, David Du, Bingzhe Li |
| 2025 | UQ-VarQA: Benchmarking and Characterizing NISQ Computers Through Uncertainty Quantification of Variational Quantum Algorithms. | Priyabrata Senapati, Shengye Zhu, Bo Peng, Bo Fang, Qiang Guan |
| 2025 | Forensics of Error Rates of Quantum Hardware. | Rupshali Roy, Swaroop Ghosh |
| 2025 | TCFlash: In-Flash Bulk Bitwise Processing via Dynamic Sensing and TLC Encoding in 3D NAND. | Habib Ur Rahman, Tharini Suresh, Sudeep Pasricha, Biswajit Ray |
| 2025 | Towards Affordable, Adaptive and Automatic GNN Training on CPU-GPU Heterogeneous Platforms. | Tong Qiao, Ao Zhou, Yingjie Qi, Yiou Wang, Han Wan, Jianlei Yang, Chunming Hu |
| 2025 | TROOP: At-the-Roofline Performance for Vector Processors on Low Operational Intensity Workloads. | Navaneeth Kunhi Purayil, Diyou Shen, Matteo Perotti, Luca Benini |