| 2020 | Improving the Performance of NVM Crash Consistency under Multicore. | Zhiyuan Lu, Jianhui Yue, Yifu Deng, Yifeng Zhu |
| 2020 | APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis. | Xiaoyang Lu, Rujia Wang, Xian-He Sun |
| 2020 | EdgeNAS: Discovering Efficient Neural Architectures for Edge Systems. | Xiangzhong Luo, Di Liu, Hao Kong, Weichen Liu |
| 2020 | Stealthy-Shutdown: Practical Remote Power Attacks in Multi - Tenant FPGAs. | Yukui Luo, Cheng Gongye, Shaolei Ren, Yunsi Fei, Xiaolin Xu |
| 2020 | Loop2Recursion: Compiler-Assisted Wear Leveling for Non-Volatile Memory. | Wei Li, Libing Wu, Mengting Yuan, Chun Jason Xue, Jingling Xue, Qingan Li |
| 2020 | Accelerated Verification of Parametric Protocols with Decision Trees. | Yongjian Li, Taifeng Cao, David N. Jansen, Jun Pang, Xiaotao Wei |
| 2020 | Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis. | Marcos T. Leipnitz, Gabriel L. Nazar |
| 2020 | Reconfigurable Dataflow Optimization for Spatiotemporal Spiking Neural Computation on Systolic Array Accelerators. | Jeong-Jun Lee, Peng Li |
| 2020 | A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches. | Kyle Kuan, Tosiron Adegbija |
| 2020 | Transforming Natural Language Specifications to Logical Forms for Hardware Verification. | Rahul Krishnamurthy, Michael S. Hsiao |
| 2020 | ADAM: Adaptive Block Placement with Metadata Embedding for Hybrid Caches. | Beomjun Kim, Prashant J. Nair, Seokin Hong |
| 2020 | Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. | Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim |
| 2020 | Improving the Efficiency of Power Management via Dynamic Interrupt Management. | Ki-Dong Kang, Hyungwon Park, Gyeongseo Park, Daehoon Kim |
| 2020 | Design of Shape-Changeable Chiplet-Based Computers Using an Inductively Coupled Wireless Bus Interface. | Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai |
| 2020 | EM-GAN: Data-Driven Fast Stress Analysis for Multi-Segment Interconnects. | Wentian Jin, Sheriff Sadiqbatcha, Zeyu Sun, Han Zhou, Sheldon X.-D. Tan |
| 2020 | Re-Thinking Mixed-Criticality Architecture for Automotive Industry. | Zhe Jiang, Shuai Zhao, Pan Dong, Dawei Yang, Ran Wei, Nan Guan, Neil C. Audsley |
| 2020 | ND-HMDs: Non-Differentiable Hardware Malware Detectors against Evasive Transient Execution Attacks. | Md. Shohidul Islam, Abraham Peedikayil Kuruvila, Kanad Basu, Khaled N. Khasawneh |
| 2020 | Improving the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration. | Chao-Hsuan Huang, Ishan G. Thakkar |
| 2020 | Maximum Clique Based Method for Optimal Solution of Pattern Classification. | Xu He, Yipei Wang, Zhiyong Fu, Yao Wang, Yang Guo |
| 2020 | H2ORAM: Low Response Latency Optimized ORAM for Hybrid Memory Systems. | Wenpeng He, Fang Wang, Dan Feng |
| 2020 | Adaptive Simulation with Virtual Prototypes for RISC-V: Switching Between Fast and Accurate at Runtime. | Vladimir Herdt, Daniel Groe, Sren Tempel, Rolf Drechsler |
| 2020 | Learn to Floorplan through Acquisition of Effective Local Search Heuristics. | Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong |
| 2020 | ATT: A Fault-Tolerant ReRAM Accelerator for Attention-based Neural Networks. | Haoqiang Guo, Lu Peng, Jian Zhang, Qing Chen, Travis LeCompte |
| 2020 | ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique. | Mehran Goli, Alireza Mahzoon, Rolf Drechsler |
| 2020 | ANSim: A Fast and Versatile Asynchronous Network-On-Chip Simulator. | Tom Glint, Jitesh Sah, Manu Awasthi, Joycee Mekie |