| 2017 | Congra: Towards Efficient Processing of Concurrent Graph Queries on Shared-Memory Machines. | Peitian Pan, Chao Li |
| 2017 | DTCO for DSA-MP Hybrid Lithography with Double-BCP Materials in Sub-7nm Node. | Jiaojiao Ou, Xiaoqing Xu, Brian Cline, Greg Yeric, David Z. Pan |
| 2017 | GraphTuner: An Input Dependence Aware Loop Perforation Scheme for Efficient Execution of Approximated Graph Algorithms. | Hamza Omar, Masab Ahmad, Omer Khan |
| 2017 | DAAIP: Deadblock Aware Adaptive Insertion Policy for High Performance Caching. | Newton, Sujit Kr Mahto, Suhit Pai, Virendra Singh |
| 2017 | Using Application-Level Thread Progress Information to Manage Power and Performance. | Sabrina M. Neuman, Jason E. Miller, Daniel Snchez, Srinivas Devadas |
| 2017 | Power and Area Efficient Sorting Networks Using Unary Processing. | M. Hassan Najafi, David J. Lilja, Marc D. Riedel, Kia Bazargan |
| 2017 | Decomposed Task Mapping to Maximize QoS in Energy-Constrained Real-Time Multicores. | Lei Mo, Angeliki Kritikakou, Olivier Sentieys |
| 2017 | Exploring Scalable Data Allocation and Parallel Computing on NoC-Based Embedded Many Cores. | Yuya Maruyama, Shinpei Kato, Takuya Azumi |
| 2017 | Jenga: Efficient Fault Tolerance for Stacked DRAM. | Georgios Mappouras, Alireza Vahid, A. Robert Calderbank, Derek R. Hower, Daniel J. Sorin |
| 2017 | Compiler-Assisted Threshold Implementation against Power Analysis Attacks. | Pei Luo, Konstantinos Athanasiou, Liwei Zhang, Zhen Hang Jiang, Yunsi Fei, A. Adam Ding, Thomas Wahl |
| 2017 | Subcomponent Timing-Based Detection of Malware in Embedded Systems. | Sixing Lu, Roman Lysecky, Jerzy W. Rozenblit |
| 2017 | TDV Cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective. | Tianyue Lu, Yuhang Liu, Haiyang Pan, Mingyu Chen |
| 2017 | ReHLS: Resource-Aware Program Transformation Workflow for High-Level Synthesis. | Atieh Lotfi, Rajesh K. Gupta |
| 2017 | A Dynamic Deep Neural Network Design for Efficient Workload Allocation in Edge Computing. | Chi Lo, Yu-Yi Su, Chun-Yi Lee, Shih-Chieh Chang |
| 2017 | BACM: Barrier-Aware Cache Management for Irregular Memory-Intensive GPGPU Workloads. | Yuxi Liu, Xia Zhao, Zhibin Yu, Zhenlin Wang, Xiaolin Wang, Yingwei Luo, Lieven Eeckhout |
| 2017 | Design Exploration for Multiple Level Cell Based Non-Volatile FPGAs. | Ke Liu, Mengying Zhao, Lei Ju, Zhiping Jia, Chun Jason Xue, Jingtong Hu |
| 2017 | Neural Trojans. | Yuntao Liu, Yang Xie, Ankur Srivastava |
| 2017 | Effective Signal Restoration in Post-Silicon Validation. | Xiaobang Liu, Ranga Vemuri |
| 2017 | Exploiting Process Variation for Read Performance Improvement on LDPC Based Flash Memory Storage Systems. | Qiao Li, Liang Shi, Yejia Di, Yajuan Du, Chun Jason Xue, Edwin Hsing-Mean Sha |
| 2017 | Neural Network Classifiers Using Stochastic Computing with a Hardware-Oriented Approximate Activation Function. | Bingzhe Li, Yaobin Qin, Bo Yuan, David J. Lilja |
| 2017 | Patterning Aware Design Optimization of Selective Etching in N5 and Beyond. | Yibo Lin, Peter Debacker, Darko Trivkovic, Ryoung-Han Kim, Praveen Raghavan, David Z. Pan |
| 2017 | LDPC-Based Adaptive Multi-Error Correction for 3D Memories. | Mihai Lefter, George Razvan Voicu, Thomas Marconi, Valentin Savin, Sorin Dan Cotofana |
| 2017 | Dual Dictionary Compression for the Last Level Cache. | Akshay Lahiry, David R. Kaeli |
| 2017 | A Design-for-Test Solution for Monolithic 3D Integrated Circuits. | Abhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty |
| 2017 | T2: A Highly Accurate and Energy Efficient Stride Prefetcher. | Sushant Kondguli, Michael C. Huang |