| 2015 | Big data on low power cores: Are low power embedded processors a good fit for the big data workloads? | Maria Malik, Houman Homayoun |
| 2015 | Clustering-based revision debug in regression verification. | Djordje Maksimovic, Andreas G. Veneris, Zissis Poulos |
| 2015 | Energy-efficient reconstruction of compressively sensed bioelectrical signals with stochastic computing circuits. | Yufei Ma, Minkyu Kim, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula |
| 2015 | Data-driven logic synthesizer for acceleration of Forward propagation in artificial neural networks. | Khaled Z. Mahmoud, William E. Smith, Mark Fishkin, Timothy N. Miller |
| 2015 | Side-channel power analysis of a GPU AES implementation. | Chao Luo, Yunsi Fei, Pei Luo, Saoni Mukherjee, David R. Kaeli |
| 2015 | A low power buffer-aided vector register file for LTE baseband signal processing. | Zhiguo Liu, Ziyuan Zhu, Jinglin Shi, Jinbao Liu, Shiqiang Li |
| 2015 | Optimized local control strategy for voice-based interaction-tracking badges for social applications. | Xiaowei Liu, Alex Doboli, Fan Ye |
| 2015 | A fast and energy efficient branch and bound algorithm for NoC task mapping. | Jiashen Li, Yun Pan |
| 2015 | CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction. | Chen-Hsuan Lin, Subhendu Roy, Chun-Yao Wang, David Z. Pan, Deming Chen |
| 2015 | A methodology for power characterization of associative memories. | Dawei Li, Siddhartha Joshi, Seda Ogrenci Memik, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran |
| 2015 | Applied statistical inference for system design and management. | Benjamin C. Lee |
| 2015 | Methods for analysing and improving the fault resilience of delay-insensitive codes. | Jakob Lechner, Andreas Steininger, Florian Huemer |
| 2015 | Application behavior aware re-reference interval prediction for shared LLC. | Parth Lathigara, Shankar Balachandran, Virendra Singh |
| 2015 | Energy-optimal voltage model supporting a wide range of nodal switching rates for early design-space exploration. | Doyun Kim, Jiangyi Li, Mingoo Seok |
| 2015 | Dark silicon aware runtime mapping for many-core systems: A patterning approach. | Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen |
| 2015 | Power-aware multi-voltage custom memory models for enhancing RTL and low power verification. | Vijay Kiran Kalyanam, Martin Saint-Laurent, Jacob A. Abraham |
| 2015 | Design of high-performance, power-efficient optical NoCs using Silica-embedded silicon nanophotonics. | Elena Kakoulli, Vassos Soteriou, Charalambos Koutsides, Kyriacos Kalli |
| 2015 | Deep Packet Field Extraction Engine (DPFEE): A pre-processor for network intrusion detection and denial-of-service detection systems. | Vinayaka Jyothi, Sateesh Addepalli, Ramesh Karri |
| 2015 | Physical synthesis of DNA circuits with spatially localized gates. | Jinwook Jung, Daijoon Hyun, Youngsoo Shin |
| 2015 | Analytic processor model for fast design-space exploration. | Rik Jongerius, Giovanni Mariani, Andreea Anghel, Gero Dittmann, Erik Vermij, Henk Corporaal |
| 2015 | A novel TSV probing technique with adhesive test interposer. | Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, Huiyun Li |
| 2015 | Logic simplification by minterm complement for error tolerant application. | Hideyuki Ichihara, Tomoya Inaoka, Tsuyoshi Iwagaki, Tomoo Inoue |
| 2015 | Cyber-physical integration in programmable microfluidic biochips. | Tsung-Yi Ho, William H. Grover, Shiyan Hu, Krishnendu Chakrabarty |
| 2015 | Runtime multi-optimizations for energy efficient on-chip interconnections1. | Yuan He, Masaaki Kondo, Takashi Nakada, Hiroshi Sasaki, Shinobu Miwa, Hiroshi Nakamura |
| 2015 | Using M/G/l queueing models with vacations to analyze virtualized logic computations. | Michael J. Hall, Roger D. Chamberlain |