| 2009 | Statistical timing analysis based on simulation of lithographic process. | Aswin Sreedhar, Sandip Kundu |
| 2009 | Enabling resonant clock distribution with scaled on-chip magnetic inductors. | Saurabh Sinha, Wei Xu, Jyothi Bhaskarr Velamala, Tawab Dastagir, Bertan Bakkaloglu, Hongbin Yu, Yu Cao |
| 2009 | Reincarnate historic systems on FPGA with novel design methodology. | Naohiko Shimizu |
| 2009 | Compiler-directed leakage reduction in embedded microprocessors. | Soumyaroop Roy, Nagarajan Ranganathan, Srinivas Katkoori |
| 2009 | Optical lithography simulation using wavelet transform. | Rance Rodrigues, Aswin Sreedhar, Sandip Kundu |
| 2009 | Panoptic DVS: A fine-grained dynamic voltage scaling framework for energy scalable CMOS design. | Mateja Putic, Liang Di, Benton H. Calhoun, John C. Lach |
| 2009 | A power-aware hybrid RAM-CAM renaming mechanism for fast recovery. | Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro Lpez |
| 2009 | Imperfection-immune Carbon Nanotube digital VLSI. | Nishant Patil, Subhasish Mitra |
| 2009 | Multiplier-less and table-less linear approximation for square and square-root. | In-Cheol Park, Tae-Hwan Kim |
| 2009 | Reusing cached schedules in an out-of-order processor with in-order issue logic. | Oscar Palomar, Toni Juan, Juan J. Navarro |
| 2009 | Test-wrapper optimization for embedded cores in TSV-based three-dimensional SOCs. | Brandon Noia, Krishnendu Chakrabarty, Yuan Xie |
| 2009 | A Technology-Agnostic Simulation Environment (TASE) for iterative custom IC design across processes. | Satyanand Nalam, Mudit Bhargava, Kyle Ringgenberg, Ken Mai, Benton H. Calhoun |
| 2009 | Quality improvement and cost reduction using statistical outlier methods. | Amit Nahar, Kenneth M. Butler, John M. Carulli Jr., Charles Weinberger |
| 2009 | Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors. | Nasir Mohyuddin, Kimish Patel, Massoud Pedram |
| 2009 | Avoiding cache thrashing due to private data placement in last-level cache for manycore scaling. | Jiayuan Meng, Kevin Skadron |
| 2009 | Intra-vector SIMD instructions for core specialization. | Cor Meenderinck, Ben H. H. Juurlink |
| 2009 | Mid-range wireless energy transfer using inductive resonance for wireless sensors. | Shahrzad Jalali Mazlouman, Alireza Mahanfar, Bozena Kaminska |
| 2009 | Empirical performance models for 3T1D memories. | Kristen Lovin, Benjamin C. Lee, Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei |
| 2009 | LRU-PEA: A smart replacement policy for non-uniform cache architectures on chip multiprocessors. | Javier Lira, Carlos Molina, Antonio Gonzlez |
| 2009 | Resource sharing of pipelined custom hardware extension for energy-efficient application-specific instruction set processor design. | Hai Lin, Yunsi Fei |
| 2009 | Design and test strategies for microarchitectural post-fabrication tuning. | Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David M. Brooks |
| 2009 | Efficient architectures for elliptic curve cryptography processors for RFID. | Lawrence Leinweber, Christos A. Papachristou, Francis G. Wolff |
| 2009 | Accelerating mobile augmented reality on a handheld platform. | Seung Eun Lee, Yong Zhang, Zhen Fang, Sadagopan Srinivasan, Ravi Iyer, Donald Newell |
| 2009 | A distributed concurrent on-line test scheduling protocol for many-core NoC-based systems. | Jason D. Lee, Rabi N. Mahapatra, Praveen Bhojwani |
| 2009 | FinFET-based dynamic power management of on-chip interconnection networks through adaptive back-gate biasing. | Chun-Yi Lee, Niraj K. Jha |