Skip to content

IEEE International Conference on Computer Design

ICCD

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering

Papers indexed

3,768

1988–2025

Papers per year

1988128 peak2025

ICCD papers

3,768 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2002Environment Synthesis for Compositional Model Checking.Hong Peng, Yassine Mokhtari, Sofine Tahar
2002Cost-Effective Concurrent Test Hardware Design for Linear Analog Circuits.Sule Ozev, Alex Orailoglu
2002Media Processing Applications on the Imagine Stream Processor.John D. Owens, Scott Rixner, Ujval J. Kapasi, Peter R. Mattson, Brian Towles, Ben Serebrin, William J. Dally
2002Parallel Multiple-Symbol Variable-Length Decoding.Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Mihai Sima, Petri Liuha
2002A 10 Gbps Full-AES Crypto Design with a Twisted-BDD S-Box Architecture.Sumio Morioka, Akashi Satoh
2002Trace-Level Speculative Multithreaded Architecture.Carlos Molina, Antonio Gonzlez, Jordi Tubella
2002Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.Atsushi Mizuno, Kazuyoshi Kohno, Ryuichiro Ohyama, Takahiro Tokuyoshi, Hironori Uetani, Hans Eichel, Takashi Miyamori, Nobu Matsumoto, Masataka Matsui
2002Don't-Care Identification on Specific Bits of Test Patterns.Kohei Miyase, Seiji Kajihara, Irith Pomeranz, Sudhakar M. Reddy
2002Accelerated SAT-based Scheduling of Control/Data Flow Graphs.Seda Ogrenci Memik, Farzan Fallah
2002Data Cache Design Considerations for the ItaniumTerry Lyon, Eric Delano, Cameron McNairy, Dean Mulla
2002GPE: A New Representation for VLSI Floorplan Problem.Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2002An Efficient External-Memory Implementation of Region Query with Application to Area Routing.Stan Y. Liao, Narendra V. Shenoy, William Nicholls
2002TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol.Manfred Ley, Herbert Grnbacher
2002Floating-Point Fused Multiply-Add with Reduced Latency.Toms Lang, Javier D. Bruguera
2002Low-Power, High-Speed CMOS VLSI Design.Tadahiro Kuroda
2002Adaptive Balanced Computing (ABC) Microprocessor Using Reconfigurable Functional Caches (RFCs).Huesung Kim, Arun K. Somani, Akhilesh Tyagi
2002A Framework for Data Prefetching Using Off-Line Training of Markovian Predictors.Jinwoo Kim, Krishna V. Palem, Weng-Fai Wong
2002VLSI Design and Verification of the Imagine Processor.Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, Brian Towles
2002From ASIC to ASIP: The Next Design Discontinuity.Kurt Keutzer, Sharad Malik, A. Richard Newton
2002The Imagine Stream Processor.Ujval J. Kapasi, William J. Dally, Scott Rixner, John D. Owens, Brucek Khailany
2002Low Power Design Methodologies for Mobile Communication.Ralf Kakerow
2002A Low Energy Set-Associative I-Cache with Extended BTB.Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002An Extended Class of Sequential Circuits with Combinational Test Generation Complexity.Michiko Inoue, Chikateru Jinno, Hideo Fujiwara
2002A Design Methodology for Application-Specific Real-Time Interfaces.Stefan Ihmor, Markus Visarius, Wolfram Hardt
2002Efficient PEEC-Based Inductance Extraction Using Circuit-Aware Techniques.Haitian Hu, Sachin S. Sapatnekar
2,2262,250 of 3,768← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.