| 2004 | Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies. | Lieven Eeckhout, Robert H. Bell Jr., Bastiaan Stougie, Koen De Bosschere, Lizy Kurian John |
| 2004 | Microarchitecture Optimizations for Exploiting Memory-Level Parallelism. | Yuan Chou, Brian Fahs, Santosh G. Abraham |
| 2004 | SMTp: An Architecture for Next-generation Scalable Multi-threading. | Mainak Chaudhuri, Mark A. Heinrich |
| 2004 | Memory Ordering: A Value-Based Approach. | Harold W. Cain, Mikko H. Lipasti |
| 2004 | Use-Based Register Caching with Decoupled Indexing. | J. Adam Butts, Gurindar S. Sohi |
| 2004 | X-RAY: A Non-Invasive Exclusive Caching Mechanism for RAIDs. | Lakshmi N. Bairavasundaram, Muthian Sivathanu, Andrea C. Arpaci-Dusseau, Remzi H. Arpaci-Dusseau |
| 2004 | Adaptive Cache Compression for High-Performance Processors. | Alaa R. Alameldeen, David A. Wood |
| 2004 | Evaluating the Imagine Stream Architecture. | Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das |
| 2003 | Detecting Global Stride Locality in Value Streams. | Huiyang Zhou, Jill Flanagan, Thomas M. Conte |
| 2003 | A Highly-Configurable Cache Architecture for Embedded Systems. | Chuanjun Zhang, Frank Vahid, Walid A. Najjar |
| 2003 | A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay. | Min Xu, Rastislav Bodk, Mark D. Hill |
| 2003 | SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling. | Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe |
| 2003 | Guided Region Prefetching: A Cooperative Hardware/Software Approach. | Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Kathryn S. McKinley, Charles C. Weems |
| 2003 | Banked Multiported Register Files for High-Frequency Superscalar Microprocessors. | Jessica H. Tseng, Krste Asanovic |
| 2003 | Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. | Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark |
| 2003 | A Performance Analysis of PIM, Stream Processing, and Tiled Processing on Memory-Intensive Signal Processing Kernels. | Jinwoo Suh, Eun-Gyu Kim, Stephen P. Crago, Lakshmi Srinivasan, Matthew C. French |
| 2003 | Temperature-Aware Microarchitecture. | Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan |
| 2003 | GOAL: A Load-Balanced Adaptive Routing Algorithm for Torus Networks. | Arjun Singh, William J. Dally, Amit K. Gupta, Brian Towles |
| 2003 | A Pipelined Memory Architecture for High Throughput Network Processors. | Timothy Sherwood, George Varghese, Brad Calder |
| 2003 | Phase Tracking and Prediction. | Timothy Sherwood, Suleyman Sair, Brad Calder |
| 2003 | Effective ahead Pipelining of Instruction Block Address Generation. | Andr Seznec, Antony Fraboulet |
| 2003 | Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. | Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore |
| 2003 | ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes. | Milos Prvulovic, Josep Torrellas |
| 2003 | Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage. | Michael D. Powell, T. N. Vijaykumar |
| 2003 | Iimplicitly-Multithreaded Processors. | Il Park, Babak Falsafi, T. N. Vijaykumar |