| 1998 | Retrospective: What Have We Learned from the PDP-11 - What We Have Learned from VAX and Alpha. | Gordon Bell, William D. Strecker |
| 1998 | Architecture of a Massively Parallel Processor. | Kenneth E. Batcher |
| 1998 | Retrospective: Architecture of a Massively Parallel Processor. | Kenneth E. Batcher |
| 1998 | Memory System Characterization of Commercial Workloads. | Luiz Andr Barroso, Kourosh Gharachorloo, Edouard Bugnion |
| 1998 | On the Inclusion Properties for Multi-Level Cache Hierarchies. | Jean-Loup Baer, Wen-Hann Wang |
| 1998 | Retrospective: On the Inclusion Properties for Multi-Level Cache Hierarchies. | Jean-Loup Baer, Wen-Hann Wang |
| 1998 | Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture. | David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu |
| 1998 | Warp Architecture and Implementation. | Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, Jon A. Webb |
| 1998 | Declustered Disk Array Architectures with Optimal and Near-Optimal Parallelism. | Guillermo A. Alvarez, Walter A. Burkhard, Larry J. Stockmeyer, Flaviu Cristian |
| 1998 | Dynamic IPC/Clock Rate Optimization. | David H. Albonesi |
| 1998 | An Evaluation of Directory Schemes for Cache Coherence. | Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz |
| 1998 | The MIT Alewife Machine: Architecture and Performance. | Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz |
| 1998 | Retrospective: The MIT Alewife Machine: Architecture and Performance. | Anant Agarwal |
| 1998 | Weak Ordering - A New Definition. | Sarita V. Adve, Mark D. Hill |
| 1998 | Retrospective: Weak Ordering - A New Definition. | Sarita V. Adve, Mark D. Hill |
| 1998 | Effects of Architectural and Technological Advances on the HP/Convex Exemplar's Memory and Communication Performance. | Gheith A. Abandah, Edward S. Davidson |
| 1997 | Designing High Bandwidth On-Chip Caches. | Kenneth M. Wilson, Kunle Olukotun |
| 1997 | The Mercury Interconnect Architecture: A Cost-effective Infrastructure for High-performance Servers. | Wolf-Dietrich Weber, Stephen Gold, Pat Helland, Takeshi Shimizu, Thomas Wicki, Winfried W. Wilcke |
| 1997 | Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences. | Sriram Vajapeyam, Tulika Mitra |
| 1997 | Hardware Fault Containment in Scalable Shared-Memory Multiprocessors. | Dan Teodosiu, Joel Baxter, Kinshuk Govil, John Chapin, Mendel Rosenblum, Mark Horowitz |
| 1997 | Implementing Multidestination Worms in Switch-Based Parallel Systems: Architectural Alternatives and their Impact. | Craig B. Stunkel, Rajeev Sivaram, Dhabaleswar K. Panda |
| 1997 | The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference. | Eric Sprangle, Robert S. Chappell, Mitch Alsup, Yale N. Patt |
| 1997 | Dynamic Instruction Reuse. | Avinash Sodani, Gurindar S. Sohi |
| 1997 | Data Prefetching on the HP PA-8000. | Vatsa Santhanam, Edward H. Gornish, Wei-Chung Hsu |
| 1997 | The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems. | Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, Sarita V. Adve |