| 1990 | The Impact of Synchronization and Granularity on Parallel Systems. | Ding-Kai Chen, Hong-Men Su, Pen-Chung Yew |
| 1990 | Maximizing Performance in a Striped Disk Array. | Peter M. Chen, David A. Patterson |
| 1990 | Trace-Driven Simulations for a Two-Level Cache Design in Open Bus Systems. | Hakon O. Bugge, Ernst H. Kristiansen, Bjorn O. Bakka |
| 1990 | Supporting Systolic and Memory Communciation in iWarp. | Shekhar Borkar, Robert Cohn, George W. Cox, Thomas R. Gross, H. T. Kung, Monica Lam, Margie Levine, Brian Moore, Wire Moore, Craig Peterson, Jim Susman, Jim Sutton, John Urbanski, Jon A. Webb |
| 1990 | Generation and Analysis of Very Long Address Traces. | Anita Borg, Richard E. Kessler, David W. Wall |
| 1990 | PLUS: A Distributed Shared-Memory System. | Roberto Bisiani, Mosur Ravishankar |
| 1990 | VAX Vector Architecture. | Dileep Bhandarkar, Richard Brunner |
| 1990 | Adaptive Software Cache Management for Distributed Shared Memory Architectures. | John K. Bennett, John B. Carter, Willy Zwaenepoel |
| 1990 | The K2 Parallel Processor: Architecture and Hardware Implementation. | Marco Annaratone, Marco Fillo, Kiyoshi Nakabayashi, Marc A. Viredaz |
| 1990 | Performance Comparison of Load/Store and Symmetric Instruction Set Architectures. | D. Alpert, Amir Averbuch, O. Danieli |
| 1990 | Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog. | Leon Alkalaj, Toms Lang, Milos D. Ercegovac |
| 1990 | APRIL: A Processor Architecture for Multiprocessing. | Anant Agarwal, Beng-Hong Lim, David A. Kranz, John Kubiatowicz |
| 1990 | Weak Ordering - A New Definition. | Sarita V. Adve, Mark D. Hill |
| 1989 | Supporting Reference and Dirty Bits in SPUR's Virtual Address Cache. | David A. Wood, Randy H. Katz |
| 1989 | A Type Driven Hardware Engine for Prolog Clause Retrieval over a Large Knowledge Base. | Kam-Fai Wong, M. Howard Williams |
| 1989 | An Aperiodic Storage Scheme to Reduce Memory Conflicts in Vector Processors. | Shlomo Weiss |
| 1989 | Exploring the Benefits of Multiple Hardware Contexts in a Multiprocessor Architecture: Preliminary Results. | Wolf-Dietrich Weber, Anoop Gupta |
| 1989 | Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy. | Wen-Hann Wang, Jean-Loup Baer, Henry M. Levy |
| 1989 | Systematic Hardware Adaptation of Systolic Algorithms. | Miguel Valero-Garca, Juan J. Navarro, Jos M. Llabera, Mateo Valero |
| 1989 | On Data Synchronization for Multiprocessors. | Hong-Men Su, Pen-Chung Yew |
| 1989 | A Cache Consistency Protocol for Multiprocessors with Multistage Networks. | Per Stenstrm |
| 1989 | The Impact of Code Density on Instruction Cache Performance. | Peter Steenkiste |
| 1989 | A High Performance Prolog Processor with Multiple Function Units. | Ashok Singhal, Yale N. Patt |
| 1989 | Using Feedback to Control Tree Saturation in Multistage Interconnection Networks. | Steven L. Scott, Gurindar S. Sohi |
| 1989 | Run-Time Checking in Lisp by Integrating Memory Addressing and Range Checking. | Mitsuhisa Sato, Shuichi Ichikawa, Eiichi Goto |