| 2026 | Precise Hardware Trojan Localization at RTL Through Graph-Based Feature Integration. | Lingjuan Wu, Tianle You, Siyu Tian, Hao Su, Zhongkai Huang, Wei Hu |
| 2026 | Interactive State Space Model with Cross-Modal Local Scanning for Depth Super-Resolution. | Chen Wu, Ling Wang, Zhuoran Zheng, Xiangyu Chen, Jingyuan Xia, Weidong Jiang, Jiantao Zhou |
| 2026 | A 0-400MHz DDFS Based on the Multi-Level CORDIC Pipeline for Radar Applications in 65-nm CMOS Process. | Jiang Wu, Yiqing Wang, Buwen Liu, Guixiang Jin, Weifeng Sun, Zhongyuan Fang |
| 2026 | IDEA: A Real-Time Unified Accelerator for Dual-Task Image Restoration: Dehazing and Illumination Enhancement. | Gaoxiang Wu, Jingke Wang, Liang Chang, Sichen Liu, Jiahao Zeng, Liang Zhou, Jun Zhou |
| 2026 | Topology-Mapping Co-Design for Scalable LLM Accelerators with Hierarchical Mesh-of-Trees NoC. | Zhen Wu, Yimin Wang, Yue Jiet Chong, Xuanyao Fong |
| 2026 | FeRAM-Based Reconfigurable Strong PUF with Ultra-Low Power and Enhanced Attack Resilience. | Xiguang Wu, Yue Ma, Pengcheng Yang, Bo Li, Jiuren Zhou, Wei Mao, Bing Chen, Zhou Wang, Yan Liu, Genquan Han |
| 2026 | Layout-Aware Standard Cell Synthesis via Reparameterization Multi-Task Bayesian Optimization. | Zhouyang Wu, Ruiyu Lyu, Keren Zhu, Zhiang Wang, Zhaori Bi, Changhao Yan, Xuan Zeng |
| 2026 | A 196-MHz Bandwidth Transimpedance Amplifier with High Out-of-Band Rejection Employing Transmission Zeros. | Hexuan Wu, Wei Li, Yunyou Pu, Xingyu Ma, Hongtao Xu |
| 2026 | Reliability and Optimization for Neural Network Accelerators using Value-Aware Error-Marking Pattern with Sequential Access Error Correction. | Jun-Shen Wu, Ren-Shuo Liu |
| 2026 | Parallel Critic-Free Reinforcement Learning with Direct Parameter Space Mapping for Large-Scale Analog LDO Sizing. | Han Wu, Haoning Jiang, Ziheng Wang, Zhuoli Ouyang, Chen Hu, Bo Yuan, Yan Lu, Junmin Jiang |
| 2026 | Layer-Aware Timing-Driven Global Routing for Advanced Technology Nodes. | Zhaoyi Wu, Haishan Huang, Benchao Zhu, Jianli Chen, Zhifeng Lin |
| 2026 | Transient Stability Prediction for AC Microgrids Using a Data-Driven Approach. | Zhenxi Wu, Hua Han, Jingxi Yang, Dong Liu, Biwei Li |
| 2026 | ERSRP: A 55nm 46.28 MPixels/(s·mm | Gaoxiang Wu, Liang Chang, Jingke Wang, Jiahao Zeng, Zhicheng Hu, Xin Zhao, Liang Zhou, Fengbin Tu, Jun Zhou |
| 2026 | A Low-Power FPGA Implementation of QRS Detection for Real-Time Heart Rate Monitoring. | Weiju Wu, Chao Chen |
| 2026 | A Compilation Framework for Domain Specific Multi-Chiplet Systems with Double-Layer Genetic Algorithms. | Qi Wu, Yichuan Bai, Chao Fang, Yuan Du, Li Du |
| 2026 | RRAM-based CAM for Energy-Efficient In-Memory Text Compression System. | Lianliang Wu, Hao Ai, Yiyang Chen, Ao Shi, Siyuan Chen, Haokai Guan, Nan Tang, Yi Xiao, Kexun Li, Kefan Tao, Yulin Feng, Zongwei Wang, Yimao Cai, Peng Huang |
| 2026 | Cryogenic Influences on Frequency Dividers and Output Buffers in Ring-Oscillator Design and Characterization. | Minda Wen, V. H. Arzate Palma, Ivan John O'Connell, Kevin G. McCarthy, Gerardo Molina Salgado |
| 2026 | MILEAM: Modeling Input-Aware Logic Errors of Approximate Multipliers using Machine Learning. | Jinghao Wen, Dongning Ma, Xun Jiao |
| 2026 | High-Selectivity RF On-Chip Dual-Passband Filter With Multiple Stopband Transmission Zeros Using Through-Glass-Via Technology. | Wei Wei, Li Yang, Jin-Xu Xu, Xi Zhu, Roberto Gmez-Garca, Xiu Yin Zhang |
| 2026 | A 240-to-945MHz 8-Phase PLL Clock Synthesizer With 1.22° Skew Calibration in 180nm HV CMOS for Closed-Loop Digital SiC/GaN Gate Driving. | Erik Wehr, Tobias Zekorn, Kenny Vohl, Ralf Wunderlich, Stefan Heinen |
| 2026 | SCOPE-3D: An Energy Efficient Accelerator for Implicit Neural Representation-based Sparse-view Computed Tomography Reconstruction. | Haochuan Wan, Haoyan Li, Xin Li, Qing Wu, Yuhan Gu, Wenyan Su, Yuyao Zhang, Xin Lou |
| 2026 | A 2-18 GHz LNA Based on Dual-mode Hybrid Coupled Frequency Response Reshaping Technique. | Kuisong Wang, Henan Zhang, Yuying Zhang, Xuming Sun, Jing Wan, Shushan Qiao, Xiaoxin Liang |
| 2026 | SRNeRV: A Scale-wise Recursive Framework for Neural Video Representation. | Jia Wang, Jun Zhu, Xinfeng Zhang |
| 2026 | A DLSK Global Phase-Shift Controlled Wireless Power Transfer System Achieving Above 90% RX Efficiency. | Fantao Wang, Wenbo Zhang, Junhong Yan, Fang An, Xiaoya Fan, Yanzhao Ma |
| 2026 | Boosting Vector Instruction Throughput in RISC-V via a Hybrid Decoupled Architecture with VLIW-Driven Execution. | Weiying Wang, Qingchen Zhai, Ruozhou Xiao, Zhiwei Zhang |