| 2000 | The impact of delay on the design of branch predictors. | Daniel A. Jimnez, Stephen W. Keckler, Calvin Lin |
| 2000 | A framework for dynamic energy efficiency and temperature management. | Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas |
| 2000 | Relational profiling: enabling thread-level parallelism in virtual machines. | Timothy H. Heil, James E. Smith |
| 2000 | An integrated approach to accelerate data and predicate computations in hyperblocks. | Alexandre E. Eichenberger, Waleed Meleis, Suman Maradani |
| 2000 | PipeRench implementation of the instruction path coprocessor. | Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen |
| 2000 | Efficient checker processor design. | Saugata Chatterjee, Christopher T. Weaver, Todd M. Austin |
| 2000 | Very low power pipelines using significance compression. | Ramon Canal, Antonio Gonzlez, James E. Smith |
| 2000 | A static power model for architects. | J. Adam Butts, Gurindar S. Sohi |
| 2000 | Breathing life into a paper tiger (keynote session). | Darrell Boggs |
| 2000 | Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors. | Amirali Baniasadi, Andreas Moshovos |
| 2000 | Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures. | Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas |
| 2000 | A whole new ballgame - supercomputing on two AA batteries (keynote session). | David Baker |
| 1999 | The Use of Multithreading for Exception Handling. | Craig B. Zilles, Joel S. Emer, Gurindar S. Sohi |
| 1999 | A Superscalar 3D Graphics Engine. | Andrew Wolfe, Derek B. Noonburg |
| 1999 | Core Technologies in Hardware and Software. | Bruce D. Shriver |
| 1999 | Control Independence in Trace Processors. | Eric Rotenberg, James E. Smith |
| 1999 | Fetch Directed Instruction Prefetching. | Glenn Reinman, Brad Calder, Todd M. Austin |
| 1999 | New Microarchitecture Challenges in the Coming Generations of CMOS Process Technologies. | Fred J. Pollack |
| 1999 | Code Transformations to Improve Memory Parallelism. | Vijay S. Pai, Sarita V. Adve |
| 1999 | Exploiting ILP in Page-based Intelligent Memory. | Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew K. Farrens, Aneet Chopra |
| 1999 | Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing. | Soner nder, Rajiv Gupta |
| 1999 | Predicting the Usefulness of a Block Result: A Micro-Architectural Technique for High-Performance Low-Power Processors. | Enric Musoll |
| 1999 | Read-After-Read Memory Dependence Prediction. | Andreas Moshovos, Gurindar S. Sohi |
| 1999 | Delaying Physical Register Allocation through Virtual-Physical Registers. | Teresa Monreal, Antonio Gonzlez, Mateo Valero, Jos Gonzlez, Vctor Vials |
| 1999 | Dynamic 3D Graphics Workload Characterization and the Architectural Implications. | Tulika Mitra, Tzi-cker Chiueh |